amr_arch64 - Version 0.0.2

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xcube 2017-12-20 16:30:06 +01:00
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# XMR_A64 # XMR_ARCH64
XMR_A64 is high performance Monero (XMR) CPU miner for Arch64 Linux on RPi3 board. XMR_ARCH64 is high performance Monero (XMR) CPU miner for Arch64 Linux on RPi3 board.
Windows support inherited from xmrig/xmrig will be discarded in further development. Windows support inherited from xmrig/xmrig will be discarded in further development.
Originally forked from xmrig/xmrig with full development in C++11. Originally forked from xmrig/xmrig with full development in C++11.
@ -21,7 +21,7 @@ Originally forked from xmrig/xmrig with full development in C++11.
* [Contacts](#contacts) * [Contacts](#contacts)
## Version ## Version
* Code version: 0.0.1 * Code version: 0.0.2
## Features ## Features
* High performance. * High performance.
@ -39,14 +39,19 @@ Originally forked from xmrig/xmrig with full development in C++11.
* Clone with `git clone https://github.com/avujic/xmr_arch64.git` :hammer: [Build instructions](https://github.com/avujic/xmr_arch64/wiki/Build). * Clone with `git clone https://github.com/avujic/xmr_arch64.git` :hammer: [Build instructions](https://github.com/avujic/xmr_arch64/wiki/Build).
## Usage ## Usage
### Quick start
`./xmr_arch64`
`config.json from working folder will be used. config.json examples can be found in src folder`
### Basic example ### Basic example
``` ```
xmr_a64 -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k ./xmr_arch64 -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k
``` ```
### Failover ### Failover
``` ```
xmr_a64 -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k ./xmr_arch64 -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k
``` ```
For failover you can add multiple pools, maximum count not limited. For failover you can add multiple pools, maximum count not limited.
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Also you can use configuration via config file, default **config.json**. You can load multiple config files and combine it with command line options. Also you can use configuration via config file, default **config.json**. You can load multiple config files and combine it with command line options.
## Algorithm variations ## Algorithm variations
Since xmrig/xmrig version 0.8.0.1 Since avujic/xmr_arch64 version 0.0.2
* `--av=1` For CPUs with hardware AES. * `--av=1` For CPUs with hardware AES.
* `--av=2` Lower power mode (double hash) of `1`. * `--av=2` Lower power mode (double hash) of `1`.
* `--av=3` Software AES implementation. * `--av=3` Software AES implementation. `So far, only this option works on Arch64/Rpi3`
* `--av=4` Lower power mode (double hash) of `3`. * `--av=4` Lower power mode (double hash) of `3`.
## Common Issues ## Common Issues
### HUGE PAGES unavailable ### HUGE PAGES unavailable
* Run XMRig as Administrator. * TBD
* Since version 0.8.0 XMRig automatically enable SeLockMemoryPrivilege for current user, but reboot or sign out still required. [Manual instruction](https://msdn.microsoft.com/en-gb/library/ms190730.aspx).
## Other information ## Other information
* No HTTP support, only stratum protocol support. * No HTTP support, only stratum protocol support.
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### CPU mining performance ### CPU mining performance
* **Intel i7-7700** - 307 H/s (4 threads) * **Rpi3 ARCH64** - 7.3 H/s (8 threads)
* **Rpi3 Raspbian** - 5.3 H/s (4 threads)
* **Intel i7-7700** - 307 H/s (4 threads)
* **AMD Ryzen 7 1700X** - 560 H/s (8 threads) * **AMD Ryzen 7 1700X** - 560 H/s (8 threads)
Please note performance is highly dependent on system load. The numbers above are obtained on an idle system. Tasks heavily using a processor cache, such as video playback, can greatly degrade hashrate. Optimal number of threads depends on the size of the L3 cache of a processor, 1 thread requires 2 MB of cache. Please note performance is highly dependent on system load. The numbers above are obtained on an idle system. Tasks heavily using a processor cache, such as video playback, can greatly degrade hashrate. Optimal number of threads depends on the size of the L3 cache of a processor, 1 thread requires 2 MB of cache.
@ -117,7 +124,7 @@ Please note performance is highly dependent on system load. The numbers above ar
* LTC: * LTC:
## Contacts ## Contacts
* xmr@eplus.systems * `xmr@eplus.systems`
*---------------------------------------------------------------- *-----------------end of document-------------------------------------------

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#include "align.h" #include "align.h"
#define MEMORY 2097152 /* 2 MiB */ #define MEMORY 2097152 /* 2 MiB */
#define MEMORY_LITE 1048576 /* 1 MiB */ #define MEMORY_LITE 1048576 /* 1 MiB */
#define MEMORY_HEAVY 6291456 /* 6 MiB */
struct cryptonight_ctx { struct cryptonight_ctx {

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* XMR: 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD * XMR: 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD
* BTC: 1P7ujsXeX7GxQwHNnJsRMgAdNkFZmNVqJT * BTC: 1P7ujsXeX7GxQwHNnJsRMgAdNkFZmNVqJT
*/ */
constexpr const int kDonateLevel = 5; constexpr const int kDonateLevel = 3;
#endif /* __DONATE_H__ */ #endif /* __DONATE_H__ */