Update hwloc for MSVC builds to 2.9.0.
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XMRig
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afe2aa4402
commit
0ed4b35cd3
26 changed files with 658 additions and 263 deletions
243
src/3rdparty/hwloc/src/memattrs.c
vendored
243
src/3rdparty/hwloc/src/memattrs.c
vendored
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@ -1,11 +1,12 @@
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/*
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* Copyright © 2020-2021 Inria. All rights reserved.
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* Copyright © 2020-2022 Inria. All rights reserved.
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* See COPYING in top-level directory.
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*/
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#include "private/autogen/config.h"
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#include "hwloc.h"
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#include "private/private.h"
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#include "private/debug.h"
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/*****************************
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@ -49,36 +50,51 @@ hwloc__setup_memattr(struct hwloc_internal_memattr_s *imattr,
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void
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hwloc_internal_memattrs_prepare(struct hwloc_topology *topology)
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{
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#define NR_DEFAULT_MEMATTRS 4
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topology->memattrs = malloc(NR_DEFAULT_MEMATTRS * sizeof(*topology->memattrs));
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topology->memattrs = malloc(HWLOC_MEMATTR_ID_MAX * sizeof(*topology->memattrs));
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if (!topology->memattrs)
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return;
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assert(HWLOC_MEMATTR_ID_CAPACITY < NR_DEFAULT_MEMATTRS);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_CAPACITY],
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(char *) "Capacity",
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HWLOC_MEMATTR_FLAG_HIGHER_FIRST,
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HWLOC_IMATTR_FLAG_STATIC_NAME|HWLOC_IMATTR_FLAG_CONVENIENCE);
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assert(HWLOC_MEMATTR_ID_LOCALITY < NR_DEFAULT_MEMATTRS);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_LOCALITY],
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(char *) "Locality",
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HWLOC_MEMATTR_FLAG_LOWER_FIRST,
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HWLOC_IMATTR_FLAG_STATIC_NAME|HWLOC_IMATTR_FLAG_CONVENIENCE);
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assert(HWLOC_MEMATTR_ID_BANDWIDTH < NR_DEFAULT_MEMATTRS);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_BANDWIDTH],
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(char *) "Bandwidth",
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HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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assert(HWLOC_MEMATTR_ID_LATENCY < NR_DEFAULT_MEMATTRS);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_READ_BANDWIDTH],
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(char *) "ReadBandwidth",
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HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_WRITE_BANDWIDTH],
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(char *) "WriteBandwidth",
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HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_LATENCY],
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(char *) "Latency",
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HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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topology->nr_memattrs = NR_DEFAULT_MEMATTRS;
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_READ_LATENCY],
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(char *) "ReadLatency",
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HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_WRITE_LATENCY],
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(char *) "WriteLatency",
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HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
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HWLOC_IMATTR_FLAG_STATIC_NAME);
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topology->nr_memattrs = HWLOC_MEMATTR_ID_MAX;
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}
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static void
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@ -1197,3 +1213,214 @@ hwloc_get_local_numanode_objs(hwloc_topology_t topology,
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*nrp = i;
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return 0;
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}
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/**************************************
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* Using memattrs to identify HBM/DRAM
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*/
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struct hwloc_memory_tier_s {
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hwloc_obj_t node;
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uint64_t local_bw;
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enum hwloc_memory_tier_type_e {
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/* warning the order is important for guess_memory_tiers() after qsort() */
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HWLOC_MEMORY_TIER_UNKNOWN,
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HWLOC_MEMORY_TIER_DRAM,
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HWLOC_MEMORY_TIER_HBM,
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HWLOC_MEMORY_TIER_SPM, /* Specific-Purpose Memory is usually HBM, we'll use BW to confirm */
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HWLOC_MEMORY_TIER_NVM,
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HWLOC_MEMORY_TIER_GPU,
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} type;
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};
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static int compare_tiers(const void *_a, const void *_b)
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{
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const struct hwloc_memory_tier_s *a = _a, *b = _b;
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/* sort by type of tier first */
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if (a->type != b->type)
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return a->type - b->type;
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/* then by bandwidth */
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if (a->local_bw > b->local_bw)
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return -1;
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else if (a->local_bw < b->local_bw)
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return 1;
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return 0;
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}
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int
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hwloc_internal_memattrs_guess_memory_tiers(hwloc_topology_t topology)
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{
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struct hwloc_internal_memattr_s *imattr;
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struct hwloc_memory_tier_s *tiers;
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unsigned i, j, n;
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const char *env;
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int spm_is_hbm = -1; /* -1 will guess from BW, 0 no, 1 forced */
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int mark_dram = 1;
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unsigned first_spm, first_nvm;
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hwloc_uint64_t max_unknown_bw, min_spm_bw;
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env = getenv("HWLOC_MEMTIERS_GUESS");
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if (env) {
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if (!strcmp(env, "none")) {
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return 0;
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} else if (!strcmp(env, "default")) {
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/* nothing */
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} else if (!strcmp(env, "spm_is_hbm")) {
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hwloc_debug("Assuming SPM-tier is HBM, ignore bandwidth\n");
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spm_is_hbm = 1;
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} else if (HWLOC_SHOW_CRITICAL_ERRORS()) {
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fprintf(stderr, "hwloc: Failed to recognize HWLOC_MEMTIERS_GUESS value %s\n", env);
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}
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}
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imattr = &topology->memattrs[HWLOC_MEMATTR_ID_BANDWIDTH];
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if (!(imattr->iflags & HWLOC_IMATTR_FLAG_CACHE_VALID))
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hwloc__imattr_refresh(topology, imattr);
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n = hwloc_get_nbobjs_by_depth(topology, HWLOC_TYPE_DEPTH_NUMANODE);
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assert(n);
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tiers = malloc(n * sizeof(*tiers));
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if (!tiers)
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return -1;
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for(i=0; i<n; i++) {
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hwloc_obj_t node;
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const char *daxtype;
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struct hwloc_internal_location_s iloc;
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struct hwloc_internal_memattr_target_s *imtg = NULL;
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struct hwloc_internal_memattr_initiator_s *imi;
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node = hwloc_get_obj_by_depth(topology, HWLOC_TYPE_DEPTH_NUMANODE, i);
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assert(node);
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tiers[i].node = node;
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/* defaults */
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tiers[i].type = HWLOC_MEMORY_TIER_UNKNOWN;
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tiers[i].local_bw = 0; /* unknown */
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daxtype = hwloc_obj_get_info_by_name(node, "DAXType");
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/* mark NVM, SPM and GPU nodes */
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if (daxtype && !strcmp(daxtype, "NVM"))
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tiers[i].type = HWLOC_MEMORY_TIER_NVM;
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if (daxtype && !strcmp(daxtype, "SPM"))
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tiers[i].type = HWLOC_MEMORY_TIER_SPM;
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if (node->subtype && !strcmp(node->subtype, "GPUMemory"))
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tiers[i].type = HWLOC_MEMORY_TIER_GPU;
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if (spm_is_hbm == -1) {
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for(j=0; j<imattr->nr_targets; j++)
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if (imattr->targets[j].obj == node) {
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imtg = &imattr->targets[j];
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break;
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}
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if (imtg && !hwloc_bitmap_iszero(node->cpuset)) {
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iloc.type = HWLOC_LOCATION_TYPE_CPUSET;
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iloc.location.cpuset = node->cpuset;
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imi = hwloc__memattr_target_get_initiator(imtg, &iloc, 0);
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if (imi)
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tiers[i].local_bw = imi->value;
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}
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}
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}
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/* sort tiers */
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qsort(tiers, n, sizeof(*tiers), compare_tiers);
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hwloc_debug("Sorting memory tiers...\n");
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for(i=0; i<n; i++)
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hwloc_debug(" tier %u = node L#%u P#%u with tier type %d and local BW #%llu\n",
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i,
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tiers[i].node->logical_index, tiers[i].node->os_index,
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tiers[i].type, (unsigned long long) tiers[i].local_bw);
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/* now we have UNKNOWN tiers (sorted by BW), then SPM tiers (sorted by BW), then NVM, then GPU */
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/* iterate over UNKNOWN tiers, and find their BW */
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for(i=0; i<n; i++) {
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if (tiers[i].type > HWLOC_MEMORY_TIER_UNKNOWN)
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break;
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}
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first_spm = i;
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/* get max BW from first */
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if (first_spm > 0)
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max_unknown_bw = tiers[0].local_bw;
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else
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max_unknown_bw = 0;
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/* there are no DRAM or HBM tiers yet */
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/* iterate over SPM tiers, and find their BW */
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for(i=first_spm; i<n; i++) {
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if (tiers[i].type > HWLOC_MEMORY_TIER_SPM)
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break;
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}
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first_nvm = i;
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/* get min BW from last */
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if (first_nvm > first_spm)
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min_spm_bw = tiers[first_nvm-1].local_bw;
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else
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min_spm_bw = 0;
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/* FIXME: if there's more than 10% between some sets of nodes inside a tier, split it? */
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/* FIXME: if there are cpuset-intersecting nodes in same tier, abort? */
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if (spm_is_hbm == -1) {
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/* if we have BW for all SPM and UNKNOWN
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* and all SPM BW are 2x superior to all UNKNOWN BW
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*/
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hwloc_debug("UNKNOWN-memory-tier max bandwidth %llu\n", (unsigned long long) max_unknown_bw);
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hwloc_debug("SPM-memory-tier min bandwidth %llu\n", (unsigned long long) min_spm_bw);
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if (max_unknown_bw > 0 && min_spm_bw > 0 && max_unknown_bw*2 < min_spm_bw) {
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hwloc_debug("assuming SPM means HBM and !SPM means DRAM since bandwidths are very different\n");
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spm_is_hbm = 1;
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} else {
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hwloc_debug("cannot assume SPM means HBM\n");
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spm_is_hbm = 0;
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}
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}
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if (spm_is_hbm) {
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for(i=0; i<first_spm; i++)
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tiers[i].type = HWLOC_MEMORY_TIER_DRAM;
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for(i=first_spm; i<first_nvm; i++)
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tiers[i].type = HWLOC_MEMORY_TIER_HBM;
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}
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if (first_spm == n)
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mark_dram = 0;
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/* now apply subtypes */
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for(i=0; i<n; i++) {
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const char *type = NULL;
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if (tiers[i].node->subtype) /* don't overwrite the existing subtype */
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continue;
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switch (tiers[i].type) {
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case HWLOC_MEMORY_TIER_DRAM:
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if (mark_dram)
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type = "DRAM";
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break;
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case HWLOC_MEMORY_TIER_HBM:
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type = "HBM";
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break;
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case HWLOC_MEMORY_TIER_SPM:
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type = "SPM";
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break;
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case HWLOC_MEMORY_TIER_NVM:
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type = "NVM";
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break;
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default:
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/* GPU memory is already marked with subtype="GPUMemory",
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* UNKNOWN doesn't deserve any subtype
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*/
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break;
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}
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if (type) {
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hwloc_debug("Marking node L#%u P#%u as %s\n", tiers[i].node->logical_index, tiers[i].node->os_index, type);
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tiers[i].node->subtype = strdup(type);
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}
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}
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free(tiers);
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return 0;
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}
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