Implemented new style algorithm definitions (except ARM), removed Algo and Variant enums.
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30 changed files with 1223 additions and 1359 deletions
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@ -1,6 +1,13 @@
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#ifndef VARIANT4_RANDOM_MATH_H
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#define VARIANT4_RANDOM_MATH_H
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#include <string.h>
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#include "crypto/common/Algorithm.h"
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extern "C"
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{
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#include "crypto/cn/c_blake256.h"
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@ -182,7 +189,7 @@ static FORCEINLINE void check_data(size_t* data_index, const size_t bytes_needed
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// Generates as many random math operations as possible with given latency and ALU restrictions
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// "code" array must have space for NUM_INSTRUCTIONS_MAX+1 instructions
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template<xmrig::Variant VARIANT>
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template<xmrig::Algorithm::Id ALGO>
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static int v4_random_math_init(struct V4_Instruction* code, const uint64_t height)
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{
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// MUL is 3 cycles, 3-way addition and rotations are 2 cycles, SUB/XOR are 1 cycle
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@ -204,8 +211,7 @@ static int v4_random_math_init(struct V4_Instruction* code, const uint64_t heigh
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memset(data, 0, sizeof(data));
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uint64_t tmp = SWAP64LE(height);
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memcpy(data, &tmp, sizeof(uint64_t));
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if (VARIANT == xmrig::VARIANT_4)
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{
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if (ALGO == xmrig::Algorithm::CN_R) {
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data[20] = -38;
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}
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@ -249,7 +255,7 @@ static int v4_random_math_init(struct V4_Instruction* code, const uint64_t heigh
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code_size = 0;
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int total_iterations = 0;
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r8_used = (VARIANT == xmrig::VARIANT_WOW);
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r8_used = (ALGO == xmrig::Algorithm::CN_WOW);
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// Generate random code to achieve minimal required latency for our abstract CPU
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// Try to get this latency for all 4 registers
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@ -291,10 +297,9 @@ static int v4_random_math_init(struct V4_Instruction* code, const uint64_t heigh
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int b = src_index;
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// Don't do ADD/SUB/XOR with the same register
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if (((opcode == ADD) || (opcode == SUB) || (opcode == XOR)) && (a == b))
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{
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if (((opcode == ADD) || (opcode == SUB) || (opcode == XOR)) && (a == b)) {
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// a is always < 4, so we don't need to check bounds here
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b = (VARIANT == xmrig::VARIANT_WOW) ? (a + 4) : 8;
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b = (ALGO == xmrig::Algorithm::CN_WOW) ? (a + 4) : 8;
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src_index = b;
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}
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