Added CPU vendor enum.
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6163d27f14
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3b4b230cab
6 changed files with 33 additions and 18 deletions
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@ -103,6 +103,13 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
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cpu_brand_string(m_brand, data.brand_str);
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snprintf(m_backend, sizeof m_backend, "libcpuid/%s", cpuid_lib_version());
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if (data.vendor == ::VENDOR_INTEL) {
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m_vendor = VENDOR_INTEL;
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}
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else if (data.vendor == ::VENDOR_AMD) {
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m_vendor = VENDOR_AMD;
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}
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m_threads = static_cast<size_t>(data.total_logical_cpus);
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m_packages = std::max<size_t>(threads() / static_cast<size_t>(data.num_logical_cpus), 1);
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m_cores = static_cast<size_t>(data.num_cores) * m_packages;
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@ -111,13 +118,13 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
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const auto l2 = static_cast<size_t>(data.l2_cache);
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// Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97
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if (data.vendor == VENDOR_AMD && data.ext_family >= 0x15 && data.ext_family < 0x17) {
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if (m_vendor == VENDOR_AMD && data.ext_family >= 0x15 && data.ext_family < 0x17) {
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m_L2 = l2 * (cores() / 2) * m_packages;
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m_L2_exclusive = true;
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}
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// Workaround for Intel Pentium Dual-Core, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue
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// These processors have L2 cache shared by 2 cores.
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else if (data.vendor == VENDOR_INTEL && data.ext_family == 0x06 && (data.ext_model == 0x0E || data.ext_model == 0x0F || data.ext_model == 0x17)) {
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else if (m_vendor == VENDOR_INTEL && data.ext_family == 0x06 && (data.ext_model == 0x0E || data.ext_model == 0x0F || data.ext_model == 0x17)) {
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size_t l2_count_per_socket = cores() > 1 ? cores() / 2 : 1;
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m_L2 = data.l2_cache > 0 ? l2 * l2_count_per_socket * m_packages : 0;
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}
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@ -131,10 +138,10 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
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if (data.flags[CPU_FEATURE_AES]) {
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m_aes = true;
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if (data.vendor == VENDOR_AMD) {
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if (m_vendor == VENDOR_AMD) {
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m_assembly = (data.ext_family >= 23) ? Assembly::RYZEN : Assembly::BULLDOZER;
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}
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else if (data.vendor == VENDOR_INTEL) {
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else if (m_vendor == VENDOR_INTEL) {
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m_assembly = Assembly::INTEL;
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}
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}
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