From f93187b024610ed83f41e18a5b6145ff7b91f61d Mon Sep 17 00:00:00 2001 From: stanz2g Date: Sat, 6 Jan 2018 17:07:07 +0800 Subject: [PATCH 01/21] can build without microhttpd when WITH_HTTPD=OFF --- CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/CMakeLists.txt b/CMakeLists.txt index 377bdb94..1e1673ea 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -195,6 +195,7 @@ if (WITH_HTTPD) message(FATAL_ERROR "microhttpd NOT found: use `-DWITH_HTTPD=OFF` to build without http deamon support") endif() else() + set(MHD_LIBRARY "") add_definitions(/DXMRIG_NO_HTTPD) add_definitions(/DXMRIG_NO_API) endif() From 56ffa7af794c0eebaad557d1218b6ee8f766d4e5 Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 20 Jan 2018 12:58:43 +0700 Subject: [PATCH 02/21] #341 Fix wrong exit code. --- src/App.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/App.cpp b/src/App.cpp index 1c00e4fb..2eb81f56 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -113,7 +113,7 @@ App::~App() int App::exec() { if (!m_options) { - return 0; + return 2; } uv_signal_start(&m_sigHUP, App::onSignal, SIGHUP); From 9bceb65ad87e64e6e88599e0d6988cbea51c5555 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 20 Jan 2018 10:43:56 +0100 Subject: [PATCH 03/21] +15% boost with non-AES CPU Performance boost validated on Core 2 Quad processor under Windows 10. But it's Windows/MS Visual C++ specific. --- src/crypto/soft_aes.h | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index 99321c4e..148f39c1 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -91,10 +91,17 @@ alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); static inline __m128i soft_aesenc(__m128i in, __m128i key) { - const uint32_t x0 = _mm_cvtsi128_si32(in); - const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); - const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); - const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); +#if defined(_MSC_VER) + const uint32_t x0 = in.m128i_u32[0]; + const uint32_t x1 = in.m128i_u32[1]; + const uint32_t x2 = in.m128i_u32[2]; + const uint32_t x3 = in.m128i_u32[3]; +#else + const uint32_t x0 = _mm_cvtsi128_si32(in); + const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); + const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); + const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); +#endif __m128i out = _mm_set_epi32( (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), From 631fd755c814b772dc2bf95fe3c54a3273c4607b Mon Sep 17 00:00:00 2001 From: XMRig Date: Sat, 20 Jan 2018 20:43:31 +0700 Subject: [PATCH 04/21] #341 Added option --dry-run. --- src/App.cpp | 26 ++++++++++++++++++++------ src/App.h | 1 + src/Options.cpp | 14 +++++++++++--- src/Options.h | 2 ++ 4 files changed, 34 insertions(+), 9 deletions(-) diff --git a/src/App.cpp b/src/App.cpp index 2eb81f56..d656acc8 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -130,6 +130,13 @@ int App::exec() Mem::allocate(m_options->algo(), m_options->threads(), m_options->doubleHash(), m_options->hugePages()); Summary::print(); + if (m_options->dryRun()) { + LOG_NOTICE("OK"); + release(); + + return 0; + } + # ifndef XMRIG_NO_API Api::start(); # endif @@ -146,12 +153,7 @@ int App::exec() const int r = uv_run(uv_default_loop(), UV_RUN_DEFAULT); uv_loop_close(uv_default_loop()); - delete m_network; - - Options::release(); - Mem::release(); - Platform::release(); - + release(); return r; } @@ -200,6 +202,18 @@ void App::close() } +void App::release() +{ + if (m_network) { + delete m_network; + } + + Options::release(); + Mem::release(); + Platform::release(); +} + + void App::onSignal(uv_signal_t *handle, int signum) { switch (signum) diff --git a/src/App.h b/src/App.h index fcb3b71b..1b96040d 100644 --- a/src/App.h +++ b/src/App.h @@ -51,6 +51,7 @@ protected: private: void background(); void close(); + void release(); static void onSignal(uv_signal_t *handle, int signum); diff --git a/src/Options.cpp b/src/Options.cpp index 3eaf07ce..4e7c75ca 100644 --- a/src/Options.cpp +++ b/src/Options.cpp @@ -101,12 +101,16 @@ static char const short_options[] = "a:c:khBp:Px:r:R:s:t:T:o:u:O:v:Vl:S"; static struct option const options[] = { { "algo", 1, nullptr, 'a' }, + { "api-access-token", 1, nullptr, 4001 }, + { "api-port", 1, nullptr, 4000 }, + { "api-worker-id", 1, nullptr, 4002 }, { "av", 1, nullptr, 'v' }, { "background", 0, nullptr, 'B' }, { "config", 1, nullptr, 'c' }, { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, + { "dry-run", 0, nullptr, 5000 }, { "help", 0, nullptr, 'h' }, { "keepalive", 0, nullptr ,'k' }, { "log-file", 1, nullptr, 'l' }, @@ -126,9 +130,6 @@ static struct option const options[] = { { "user-agent", 1, nullptr, 1008 }, { "userpass", 1, nullptr, 'O' }, { "version", 0, nullptr, 'V' }, - { "api-port", 1, nullptr, 4000 }, - { "api-access-token", 1, nullptr, 4001 }, - { "api-worker-id", 1, nullptr, 4002 }, { 0, 0, 0, 0 } }; @@ -141,6 +142,7 @@ static struct option const config_options[] = { { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, + { "dry-run", 0, nullptr, 5000 }, { "huge-pages", 0, nullptr, 1009 }, { "log-file", 1, nullptr, 'l' }, { "max-cpu-usage", 1, nullptr, 1004 }, @@ -205,6 +207,7 @@ Options::Options(int argc, char **argv) : m_background(false), m_colors(true), m_doubleHash(false), + m_dryRun(false), m_hugePages(true), m_ready(false), m_safe(false), @@ -384,6 +387,7 @@ bool Options::parseArg(int key, const char *arg) case 'S': /* --syslog */ case 1005: /* --safe */ case 1006: /* --nicehash */ + case 5000: /* --dry-run */ return parseBoolean(key, true); case 1002: /* --no-color */ @@ -557,6 +561,10 @@ bool Options::parseBoolean(int key, bool enable) m_colors = enable; break; + case 5000: /* --dry-run */ + m_dryRun = enable; + break; + default: break; } diff --git a/src/Options.h b/src/Options.h index 9070888f..6f074917 100644 --- a/src/Options.h +++ b/src/Options.h @@ -59,6 +59,7 @@ public: inline bool background() const { return m_background; } inline bool colors() const { return m_colors; } inline bool doubleHash() const { return m_doubleHash; } + inline bool dryRun() const { return m_dryRun; } inline bool hugePages() const { return m_hugePages; } inline bool syslog() const { return m_syslog; } inline const char *apiToken() const { return m_apiToken; } @@ -110,6 +111,7 @@ private: bool m_background; bool m_colors; bool m_doubleHash; + bool m_dryRun; bool m_hugePages; bool m_ready; bool m_safe; From 15fe6ce23f4aa2654bb8b458463e6213ee867486 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 27 Jan 2018 11:42:22 +0100 Subject: [PATCH 05/21] Remove compilation warnings under MSVC --- src/api/NetworkState.cpp | 4 ++-- src/net/Client.cpp | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/api/NetworkState.cpp b/src/api/NetworkState.cpp index bae290d0..d3ffddd3 100644 --- a/src/api/NetworkState.cpp +++ b/src/api/NetworkState.cpp @@ -46,7 +46,7 @@ NetworkState::NetworkState() : int NetworkState::connectionTime() const { - return m_active ? ((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0; + return m_active ? (int)((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0; } @@ -56,7 +56,7 @@ uint32_t NetworkState::avgTime() const return 0; } - return (uint32_t) connectionTime() / m_latency.size(); + return connectionTime() / (uint32_t)m_latency.size(); } diff --git a/src/net/Client.cpp b/src/net/Client.cpp index 8e8ebcfd..fcaec8eb 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -532,7 +532,7 @@ void Client::onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t auto client = getClient(handle->data); buf->base = &client->m_recvBuf.base[client->m_recvBufPos]; - buf->len = client->m_recvBuf.len - client->m_recvBufPos; + buf->len = client->m_recvBuf.len - (ULONG)client->m_recvBufPos; } From 9a28ad590ca6137bf5e19ba477e3f379527bbd73 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sun, 28 Jan 2018 12:58:19 +0100 Subject: [PATCH 06/21] up to 20% perf increase with Cryptonight with non-AES CPU This time, the performance increase is got with MSVC and GCC. On non-AES CPU, there were an useless load/store SSE2 register. The last MSVC "hack" is replaced by a portable code and he's more complete (a load is saved). On my C2Q6600, with 3 thread, I have +16% with MSVC2015 and +20% with GCC 7.3, compared to official 2.4.4 version. --- src/crypto/CryptoNight_arm.h | 30 +++++++++-------- src/crypto/CryptoNight_x86.h | 62 ++++++++++++++++++------------------ src/crypto/soft_aes.h | 17 +++------- 3 files changed, 52 insertions(+), 57 deletions(-) diff --git a/src/crypto/CryptoNight_arm.h b/src/crypto/CryptoNight_arm.h index 15be6c3d..17bba7af 100644 --- a/src/crypto/CryptoNight_arm.h +++ b/src/crypto/CryptoNight_arm.h @@ -194,14 +194,14 @@ template static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7) { if (SOFT_AES) { - *x0 = soft_aesenc(*x0, key); - *x1 = soft_aesenc(*x1, key); - *x2 = soft_aesenc(*x2, key); - *x3 = soft_aesenc(*x3, key); - *x4 = soft_aesenc(*x4, key); - *x5 = soft_aesenc(*x5, key); - *x6 = soft_aesenc(*x6, key); - *x7 = soft_aesenc(*x7, key); + *x0 = soft_aesenc((uint32_t*)x0, key); + *x1 = soft_aesenc((uint32_t*)x1, key); + *x2 = soft_aesenc((uint32_t*)x2, key); + *x3 = soft_aesenc((uint32_t*)x3, key); + *x4 = soft_aesenc((uint32_t*)x4, key); + *x5 = soft_aesenc((uint32_t*)x5, key); + *x6 = soft_aesenc((uint32_t*)x6, key); + *x7 = soft_aesenc((uint32_t*)x7, key); } # ifndef XMRIG_ARMv7 else { @@ -361,12 +361,13 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + __m128i cx; if (SOFT_AES) { - cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); } else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); # ifndef XMRIG_ARMv7 cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); # endif @@ -425,14 +426,15 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx1 = h1[0] ^ h1[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + __m128i cx0, cx1; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); } else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 362a1a9f..786d28f1 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -193,14 +193,14 @@ template static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7) { if (SOFT_AES) { - *x0 = soft_aesenc(*x0, key); - *x1 = soft_aesenc(*x1, key); - *x2 = soft_aesenc(*x2, key); - *x3 = soft_aesenc(*x3, key); - *x4 = soft_aesenc(*x4, key); - *x5 = soft_aesenc(*x5, key); - *x6 = soft_aesenc(*x6, key); - *x7 = soft_aesenc(*x7, key); + *x0 = soft_aesenc((uint32_t*)x0, key); + *x1 = soft_aesenc((uint32_t*)x1, key); + *x2 = soft_aesenc((uint32_t*)x2, key); + *x3 = soft_aesenc((uint32_t*)x3, key); + *x4 = soft_aesenc((uint32_t*)x4, key); + *x5 = soft_aesenc((uint32_t*)x5, key); + *x6 = soft_aesenc((uint32_t*)x6, key); + *x7 = soft_aesenc((uint32_t*)x7, key); } else { *x0 = _mm_aesenc_si128(*x0, key); @@ -324,19 +324,18 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + __m128i cx; - if (SOFT_AES) { - cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0)); - } - else { - cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); - } - - _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); - idx0 = EXTRACT64(cx); - bx0 = cx; + if (SOFT_AES) { + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + } + else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); + } + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); + idx0 = EXTRACT64(cx); + bx0 = cx; uint64_t hi, lo, cl, ch; cl = ((uint64_t*) &l0[idx0 & MASK])[0]; @@ -386,18 +385,19 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx0 = h0[0] ^ h0[4]; uint64_t idx1 = h1[0] ^ h1[4]; - for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx0, cx1; - if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); - } - else { - cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); - } + if (SOFT_AES) { + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + } + else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); + cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); + } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); _mm_store_si128((__m128i *) &l1[idx1 & MASK], _mm_xor_si128(bx1, cx1)); diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index 148f39c1..b7698ac4 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -89,19 +89,12 @@ alignas(16) const uint32_t saes_table[4][256] = { saes_data(saes_u0), saes_data(saes_u1), saes_data(saes_u2), saes_data(saes_u3) }; alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); -static inline __m128i soft_aesenc(__m128i in, __m128i key) +static inline __m128i soft_aesenc(const uint32_t* in, __m128i key) { -#if defined(_MSC_VER) - const uint32_t x0 = in.m128i_u32[0]; - const uint32_t x1 = in.m128i_u32[1]; - const uint32_t x2 = in.m128i_u32[2]; - const uint32_t x3 = in.m128i_u32[3]; -#else - const uint32_t x0 = _mm_cvtsi128_si32(in); - const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55)); - const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA)); - const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF)); -#endif + const uint32_t x0 = in[0]; + const uint32_t x1 = in[1]; + const uint32_t x2 = in[2]; + const uint32_t x3 = in[3]; __m128i out = _mm_set_epi32( (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), From d2964576c7da7784d060116a4970f60f6b895f10 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sun, 28 Jan 2018 18:13:00 +0100 Subject: [PATCH 07/21] Compilation error under FreeBSD ULONG is not recognized under this OS, so replaced it with more portable definition. --- src/net/Client.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/net/Client.cpp b/src/net/Client.cpp index fcaec8eb..fb83acd2 100644 --- a/src/net/Client.cpp +++ b/src/net/Client.cpp @@ -532,7 +532,7 @@ void Client::onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t auto client = getClient(handle->data); buf->base = &client->m_recvBuf.base[client->m_recvBufPos]; - buf->len = client->m_recvBuf.len - (ULONG)client->m_recvBufPos; + buf->len = client->m_recvBuf.len - (unsigned long)client->m_recvBufPos; } From a91759086288313d639ea353b3c9c6ebaaa605a2 Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:14:39 +0200 Subject: [PATCH 08/21] Update README.md --- README.md | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/README.md b/README.md index 6ab4b6a2..2d32c639 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,12 @@ # XMRig +[![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) +[![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) +[![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) +> XMRig - Monero (XMR) CPU miner + XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows. Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. From 9f92449e15fe2bc53bf3b65d6e40536e83384430 Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:54:58 +0200 Subject: [PATCH 09/21] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 2d32c639..7209f1d0 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # XMRig [![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) From 75f462f0e18ecbd9cea933da8dc872d9f50c3f5f Mon Sep 17 00:00:00 2001 From: DeadManWalking <34924727+DeadManWalkingTO@users.noreply.github.com> Date: Fri, 2 Feb 2018 00:58:11 +0200 Subject: [PATCH 10/21] Update README.md --- README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 7209f1d0..5f5a9db0 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # XMRig [![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) -[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases) +[![GitHub Release Date](https://img.shields.io/github/release-date-pre/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases) [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) From 037abd703720cc52f228c99d1e0e205ce48abd85 Mon Sep 17 00:00:00 2001 From: Foudge Date: Sat, 3 Feb 2018 16:03:14 +0100 Subject: [PATCH 11/21] Correct L2 cache size calculation for Intel Core 2 family This is a workaround for total L2 cache size calculation of Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue. These processors have L2 cache shared by 2 cores. There is maybe more CPU with L2 shared cache, but I am sure that these models are concerned and they are not so numerous. A better way would be to modify libcpuid to implement L2 cache counting. --- src/Cpu.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/Cpu.cpp b/src/Cpu.cpp index ff6f49e9..b122e156 100644 --- a/src/Cpu.cpp +++ b/src/Cpu.cpp @@ -100,7 +100,13 @@ void Cpu::initCommon() m_l2_cache = data.l2_cache * (m_totalCores / 2) * m_sockets; m_l2_exclusive = true; } - else { + // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue + // These processors have L2 cache shared by 2 cores. + else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { + int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; + m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; + } + else{ m_l2_cache = data.l2_cache > 0 ? data.l2_cache * m_totalCores * m_sockets : 0; } From e78e810cfea6bb5594a6be3720378d83e29a3675 Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 8 Feb 2018 17:02:32 +0700 Subject: [PATCH 12/21] Fix code style, replace tabs to space. --- src/Cpu.cpp | 14 +++++------ src/crypto/CryptoNight_x86.h | 46 ++++++++++++++++++------------------ src/crypto/soft_aes.h | 30 +++++++++++------------ 3 files changed, 45 insertions(+), 45 deletions(-) diff --git a/src/Cpu.cpp b/src/Cpu.cpp index b122e156..a619781e 100644 --- a/src/Cpu.cpp +++ b/src/Cpu.cpp @@ -100,13 +100,13 @@ void Cpu::initCommon() m_l2_cache = data.l2_cache * (m_totalCores / 2) * m_sockets; m_l2_exclusive = true; } - // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue - // These processors have L2 cache shared by 2 cores. - else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { - int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; - m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; - } - else{ + // Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue + // These processors have L2 cache shared by 2 cores. + else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) { + int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1; + m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0; + } + else{ m_l2_cache = data.l2_cache > 0 ? data.l2_cache * m_totalCores * m_sockets : 0; } diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 786d28f1..927aab72 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -324,18 +324,18 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; + __m128i cx; - if (SOFT_AES) { - cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); - } - else { - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); - } - _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); - idx0 = EXTRACT64(cx); - bx0 = cx; + if (SOFT_AES) { + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + } + else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0)); + } + _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx)); + idx0 = EXTRACT64(cx); + bx0 = cx; uint64_t hi, lo, cl, ch; cl = ((uint64_t*) &l0[idx0 & MASK])[0]; @@ -385,19 +385,19 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, uint64_t idx0 = h0[0] ^ h0[4]; uint64_t idx1 = h1[0] ^ h1[4]; - for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0, cx1; + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx0, cx1; - if (SOFT_AES) { - cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); - } - else { - cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); - cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); - } + if (SOFT_AES) { + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + } + else { + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); + cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); + } _mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx0)); _mm_store_si128((__m128i *) &l1[idx1 & MASK], _mm_xor_si128(bx1, cx1)); diff --git a/src/crypto/soft_aes.h b/src/crypto/soft_aes.h index b7698ac4..0703f98d 100644 --- a/src/crypto/soft_aes.h +++ b/src/crypto/soft_aes.h @@ -91,32 +91,32 @@ alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0); static inline __m128i soft_aesenc(const uint32_t* in, __m128i key) { - const uint32_t x0 = in[0]; - const uint32_t x1 = in[1]; - const uint32_t x2 = in[2]; - const uint32_t x3 = in[3]; + const uint32_t x0 = in[0]; + const uint32_t x1 = in[1]; + const uint32_t x2 = in[2]; + const uint32_t x3 = in[3]; - __m128i out = _mm_set_epi32( - (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), - (saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]), - (saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]), - (saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24])); + __m128i out = _mm_set_epi32( + (saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]), + (saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]), + (saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]), + (saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24])); - return _mm_xor_si128(out, key); + return _mm_xor_si128(out, key); } static inline uint32_t sub_word(uint32_t key) { - return (saes_sbox[key >> 24 ] << 24) | - (saes_sbox[(key >> 16) & 0xff] << 16 ) | - (saes_sbox[(key >> 8) & 0xff] << 8 ) | - saes_sbox[key & 0xff]; + return (saes_sbox[key >> 24 ] << 24) | + (saes_sbox[(key >> 16) & 0xff] << 16 ) | + (saes_sbox[(key >> 8) & 0xff] << 8 ) | + saes_sbox[key & 0xff]; } #if defined(__clang__) || defined(XMRIG_ARM) static inline uint32_t _rotr(uint32_t value, uint32_t amount) { - return (value >> amount) | (value << ((32 - amount) & 31)); + return (value >> amount) | (value << ((32 - amount) & 31)); } #endif From 184f79ad3f51db2e49aebd06565b05a4d358ab2f Mon Sep 17 00:00:00 2001 From: XMRig Date: Thu, 8 Feb 2018 17:21:12 +0700 Subject: [PATCH 13/21] Fix code style, replace tabs to space #2. --- src/crypto/CryptoNight_arm.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/crypto/CryptoNight_arm.h b/src/crypto/CryptoNight_arm.h index 17bba7af..4ac14f34 100644 --- a/src/crypto/CryptoNight_arm.h +++ b/src/crypto/CryptoNight_arm.h @@ -361,13 +361,13 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void * uint64_t idx0 = h0[0] ^ h0[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; + __m128i cx; if (SOFT_AES) { cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); } else { - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); # ifndef XMRIG_ARMv7 cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); # endif @@ -433,8 +433,8 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size, cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); } else { - cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); - cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); From f0604d1e975b26ec1a2e5cba85e5d6daf8ebd074 Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:06:10 +0700 Subject: [PATCH 14/21] Update README.md --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 6ab4b6a2..c33216d1 100644 --- a/README.md +++ b/README.md @@ -3,6 +3,7 @@ XMRig is a high performance Monero (XMR) CPU miner, with official support for Wi Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. * This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). +* You can use [config.xmrig.com](https://config.xmrig.com/) to generate/edit/share your configurations. :new: * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. From c9acc2912e9e71d234648bec2595137bec355dfc Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:32:36 +0700 Subject: [PATCH 15/21] Update CHANGELOG.md --- CHANGELOG.md | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 878ff984..c23c5d29 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,8 @@ +# v2.4.5 +- [#324](https://github.com/xmrig/xmrig/pull/324) Fixed build without libmicrohttpd (CMake cache issue). +- [#341](https://github.com/xmrig/xmrig/issues/341) Fixed wrong exit code and added command line option `--dry-run`. +- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase with for non-AES CPU and fixed Intel Core 2 cache detection. + # v2.4.4 - Added libmicrohttpd version to --version output. - Fixed bug in singal handler, in some cases miner wasn't shutdown properly. From cc22c9d61c3b4fb9b40c4895596fbf2ee48a8530 Mon Sep 17 00:00:00 2001 From: xmrig Date: Sun, 18 Feb 2018 05:49:37 +0700 Subject: [PATCH 16/21] Update README.md --- README.md | 1 - 1 file changed, 1 deletion(-) diff --git a/README.md b/README.md index ef385625..d208dfce 100644 --- a/README.md +++ b/README.md @@ -5,7 +5,6 @@ [![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE) [![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers) [![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network) -> XMRig - Monero (XMR) CPU miner XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows. Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. From f5a0429f0da3bc867c0c92d82e178467f4de2ab3 Mon Sep 17 00:00:00 2001 From: xmrig Date: Mon, 19 Feb 2018 04:17:50 +0700 Subject: [PATCH 17/21] Update README.md --- README.md | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/README.md b/README.md index d208dfce..b563d5b0 100644 --- a/README.md +++ b/README.md @@ -10,7 +10,6 @@ XMRig is a high performance Monero (XMR) CPU miner, with official support for Wi Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++. * This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd). -* You can use [config.xmrig.com](https://config.xmrig.com/) to generate/edit/share your configurations. :new: * [Roadmap](https://github.com/xmrig/xmrig/issues/106) for next releases. @@ -45,16 +44,7 @@ Originally based on cpuminer-multi with heavy optimizations/rewrites and removin * Clone with `git clone https://github.com/xmrig/xmrig.git` :hammer: [Build instructions](https://github.com/xmrig/xmrig/wiki/Build). ## Usage -### Basic example -``` -xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k -``` - -### Failover -``` -xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k -``` -For failover you can add multiple pools, maximum count not limited. +Use [config.xmrig.com](https://config.xmrig.com/xmrig) to generate, edit or share configurations. ### Options ``` From 9af8ceb063289c5d809cb7a181cb17b5088fec2e Mon Sep 17 00:00:00 2001 From: XMRig Date: Mon, 19 Feb 2018 04:31:50 +0700 Subject: [PATCH 18/21] v2.4.5 RC --- src/version.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/version.h b/src/version.h index 52058eec..d34b45a5 100644 --- a/src/version.h +++ b/src/version.h @@ -27,7 +27,7 @@ #define APP_ID "xmrig" #define APP_NAME "XMRig" #define APP_DESC "XMRig CPU miner" -#define APP_VERSION "2.4.4" +#define APP_VERSION "2.4.5" #define APP_DOMAIN "xmrig.com" #define APP_SITE "www.xmrig.com" #define APP_COPYRIGHT "Copyright (C) 2016-2018 xmrig.com" @@ -35,7 +35,7 @@ #define APP_VER_MAJOR 2 #define APP_VER_MINOR 4 -#define APP_VER_BUILD 4 +#define APP_VER_BUILD 5 #define APP_VER_REV 0 #ifdef _MSC_VER From 79345119c60e53d0d29ef2bde92c50483e009bad Mon Sep 17 00:00:00 2001 From: xmrig Date: Mon, 19 Feb 2018 15:58:44 +0700 Subject: [PATCH 19/21] Update CHANGELOG.md --- CHANGELOG.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index c23c5d29..8e2e6522 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,7 +1,7 @@ # v2.4.5 - [#324](https://github.com/xmrig/xmrig/pull/324) Fixed build without libmicrohttpd (CMake cache issue). - [#341](https://github.com/xmrig/xmrig/issues/341) Fixed wrong exit code and added command line option `--dry-run`. -- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase with for non-AES CPU and fixed Intel Core 2 cache detection. +- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase for non-AES CPU and fixed Intel Core 2 cache detection. # v2.4.4 - Added libmicrohttpd version to --version output. From 4f6200f057ccb69dacc2136ae9fb2e16a1fe7be6 Mon Sep 17 00:00:00 2001 From: BenDroid Date: Fri, 2 Mar 2018 21:29:53 +0100 Subject: [PATCH 20/21] Manual merge --- src/App.cpp | 7 ---- src/Options.cpp | 8 ----- src/crypto/CryptoNight_arm.h | 65 +++++++++++++++++++++++------------- src/crypto/CryptoNight_x86.h | 49 ++++++++++++++++++--------- 4 files changed, 75 insertions(+), 54 deletions(-) diff --git a/src/App.cpp b/src/App.cpp index ced052b8..4f4fb205 100644 --- a/src/App.cpp +++ b/src/App.cpp @@ -147,13 +147,6 @@ int App::start() Summary::print(); - if (m_options->dryRun()) { - LOG_NOTICE("OK"); - release(); - - return 0; - } - # ifndef XMRIG_NO_API Api::start(); # endif diff --git a/src/Options.cpp b/src/Options.cpp index b0c056d8..d3b15062 100644 --- a/src/Options.cpp +++ b/src/Options.cpp @@ -136,7 +136,6 @@ static struct option const options[] = { { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, - { "dry-run", 0, nullptr, 5000 }, { "help", 0, nullptr, 'h' }, { "keepalive", 0, nullptr ,'k' }, { "log-file", 1, nullptr, 'l' }, @@ -185,7 +184,6 @@ static struct option const config_options[] = { { "cpu-affinity", 1, nullptr, 1020 }, { "cpu-priority", 1, nullptr, 1021 }, { "donate-level", 1, nullptr, 1003 }, - { "dry-run", 0, nullptr, 5000 }, { "huge-pages", 0, nullptr, 1009 }, { "log-file", 1, nullptr, 'l' }, { "max-cpu-usage", 1, nullptr, 1004 }, @@ -510,8 +508,6 @@ bool Options::parseArg(int key, const char *arg) case 'S': /* --syslog */ case 1005: /* --safe */ case 1006: /* --nicehash */ - case 5000: /* --dry-run */ - return parseBoolean(key, true); case 1002: /* --no-color */ case 1009: /* --no-huge-pages */ @@ -725,10 +721,6 @@ bool Options::parseBoolean(int key, bool enable) m_colors = enable; break; - case 5000: /* --dry-run */ - m_dryRun = enable; - break; - default: break; } diff --git a/src/crypto/CryptoNight_arm.h b/src/crypto/CryptoNight_arm.h index d4911e9b..799d3804 100644 --- a/src/crypto/CryptoNight_arm.h +++ b/src/crypto/CryptoNight_arm.h @@ -392,11 +392,11 @@ public: for (size_t i = 0; i < ITERATIONS; i++) { for (size_t hashBlock = 0; hashBlock < NUM_HASH_BLOCKS; ++hashBlock) { __m128i cx; - cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); if (SOFT_AES) { cx = soft_aesenc(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } else { + cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } @@ -459,18 +459,18 @@ public: bx = _mm_set_epi64x(h[3] ^ h[7], h[2] ^ h[6]); idx = h[0] ^ h[4]; - for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx; + for (size_t i = 0; i < ITERATIONS; i++) { + __m128i cx; - if (SOFT_AES) { - cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); - } - else { - cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); -# ifndef XMRIG_ARMv7 - cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); -# endif + if (SOFT_AES) { + cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); } + else { + cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); + # ifndef XMRIG_ARMv7 + cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); + # endif + } _mm_store_si128((__m128i*) &l[idx & MASK], _mm_xor_si128(bx, cx)); idx = EXTRACT64(cx); @@ -530,13 +530,16 @@ public: uint64_t idx1 = h1[0] ^h1[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + __m128i cx0; + __m128i cx1; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); } else { + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); @@ -633,18 +636,23 @@ public: uint64_t idx2 = h2[0] ^h2[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0, cx1; + __m128i cx0; + __m128i cx1; + __m128i cx2; if (SOFT_AES) { cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + cx2 = soft_aesenc((uint32_t*)&l2[idx2 & MASK], _mm_set_epi64x(ah2, al2)); } else { cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]); cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i *) &l2[idx2 & MASK]); # ifndef XMRIG_ARMv7 cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); + cx2 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx2, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah2, al2); # endif } @@ -769,10 +777,10 @@ public: uint64_t idx3 = h3[0] ^h3[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); - __m128i cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); - __m128i cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + __m128i cx0; + __m128i cx1; + __m128i cx2; + __m128i cx3; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); @@ -781,6 +789,11 @@ public: cx3 = soft_aesenc(cx3, _mm_set_epi64x(ah3, al3)); } else { # ifndef XMRIG_ARMv7 + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); cx2 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx2, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah2, al2); @@ -938,11 +951,11 @@ public: uint64_t idx4 = h4[0] ^h4[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); - __m128i cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); - __m128i cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); - __m128i cx4 = _mm_load_si128((__m128i*) &l4[idx4 & MASK]); + __m128i cx0; + __m128i cx1; + __m128i cx2; + __m128i cx3; + __m128i cx4; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); @@ -952,6 +965,12 @@ public: cx4 = soft_aesenc(cx4, _mm_set_epi64x(ah4, al4)); } else { # ifndef XMRIG_ARMv7 + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + cx4 = _mm_load_si128((__m128i*) &l4[idx4 & MASK]); + cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0); cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1); cx2 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx2, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah2, al2); diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index 5715355b..c5c9c8d0 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -354,11 +354,11 @@ public: for (size_t i = 0; i < ITERATIONS; i++) { for (size_t hashBlock = 0; hashBlock < NUM_HASH_BLOCKS; ++hashBlock) { __m128i cx; - cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); if (SOFT_AES) { cx = soft_aesenc(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } else { + cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } @@ -422,11 +422,12 @@ public: idx = h[0] ^ h[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx = _mm_load_si128((__m128i*) &l[idx & MASK]); + __m128i cx; if (SOFT_AES) { cx = soft_aesenc(cx, _mm_set_epi64x(ah, al)); } else { + cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah, al)); } @@ -488,13 +489,15 @@ public: uint64_t idx1 = h1[0] ^h1[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + __m128i cx0; + __m128i cx1; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); } else { + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); } @@ -589,15 +592,18 @@ public: uint64_t idx2 = h2[0] ^h2[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); - __m128i cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + __m128i cx0; + __m128i cx1; + __m128i cx2; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); cx2 = soft_aesenc(cx2, _mm_set_epi64x(ah2, al2)); } else { + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); cx2 = _mm_aesenc_si128(cx2, _mm_set_epi64x(ah2, al2)); @@ -724,10 +730,10 @@ public: uint64_t idx3 = h3[0] ^h3[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); - __m128i cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); - __m128i cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + __m128i cx0; + __m128i cx1; + __m128i cx2; + __m128i cx3; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); @@ -735,6 +741,11 @@ public: cx2 = soft_aesenc(cx2, _mm_set_epi64x(ah2, al2)); cx3 = soft_aesenc(cx3, _mm_set_epi64x(ah3, al3)); } else { + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); cx2 = _mm_aesenc_si128(cx2, _mm_set_epi64x(ah2, al2)); @@ -891,11 +902,11 @@ public: uint64_t idx4 = h4[0] ^h4[4]; for (size_t i = 0; i < ITERATIONS; i++) { - __m128i cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); - __m128i cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); - __m128i cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); - __m128i cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); - __m128i cx4 = _mm_load_si128((__m128i*) &l4[idx4 & MASK]); + __m128i cx0; + __m128i cx1; + __m128i cx2; + __m128i cx3; + __m128i cx4; if (SOFT_AES) { cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); @@ -904,6 +915,12 @@ public: cx3 = soft_aesenc(cx3, _mm_set_epi64x(ah3, al3)); cx4 = soft_aesenc(cx4, _mm_set_epi64x(ah4, al4)); } else { + cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); + cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + cx3 = _mm_load_si128((__m128i*) &l3[idx3 & MASK]); + cx4 = _mm_load_si128((__m128i*) &l4[idx4 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); cx2 = _mm_aesenc_si128(cx2, _mm_set_epi64x(ah2, al2)); From 85ee140ea77818a3843c4f0b2454a2eccb29f72a Mon Sep 17 00:00:00 2001 From: BenDroid Date: Fri, 2 Mar 2018 21:54:23 +0100 Subject: [PATCH 21/21] Fixed merge issues --- CMakeLists.txt | 1 - src/crypto/CryptoNight_x86.h | 37 ++++++++++++++++++------------------ 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0fdb0a47..1c90d990 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -144,7 +144,6 @@ if (WITH_HTTPD) message(FATAL_ERROR "microhttpd NOT found: use `-DWITH_HTTPD=OFF` to build without http deamon support") endif() else() - set(MHD_LIBRARY "") add_definitions(/DXMRIG_NO_HTTPD) add_definitions(/DXMRIG_NO_API) endif() diff --git a/src/crypto/CryptoNight_x86.h b/src/crypto/CryptoNight_x86.h index c5c9c8d0..04686f0c 100644 --- a/src/crypto/CryptoNight_x86.h +++ b/src/crypto/CryptoNight_x86.h @@ -353,12 +353,11 @@ public: for (size_t i = 0; i < ITERATIONS; i++) { for (size_t hashBlock = 0; hashBlock < NUM_HASH_BLOCKS; ++hashBlock) { - __m128i cx; + __m128i cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); if (SOFT_AES) { cx = soft_aesenc(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } else { - cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah[hashBlock], al[hashBlock])); } @@ -425,9 +424,9 @@ public: __m128i cx; if (SOFT_AES) { - cx = soft_aesenc(cx, _mm_set_epi64x(ah, al)); + cx = soft_aesenc((uint32_t*)&l[idx & MASK], _mm_set_epi64x(ah, al)); } else { - cx = _mm_load_si128((__m128i*) &l[hashBlock][idx[hashBlock] & MASK]); + cx = _mm_load_si128((__m128i*) &l[idx & MASK]); cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah, al)); } @@ -493,11 +492,12 @@ public: __m128i cx1; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); } else { cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); } @@ -597,13 +597,14 @@ public: __m128i cx2; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); - cx2 = soft_aesenc(cx2, _mm_set_epi64x(ah2, al2)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + cx2 = soft_aesenc((uint32_t*)&l2[idx2 & MASK], _mm_set_epi64x(ah2, al2)); } else { cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); cx2 = _mm_load_si128((__m128i*) &l2[idx2 & MASK]); + cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0)); cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1)); cx2 = _mm_aesenc_si128(cx2, _mm_set_epi64x(ah2, al2)); @@ -736,10 +737,10 @@ public: __m128i cx3; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); - cx2 = soft_aesenc(cx2, _mm_set_epi64x(ah2, al2)); - cx3 = soft_aesenc(cx3, _mm_set_epi64x(ah3, al3)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + cx2 = soft_aesenc((uint32_t*)&l2[idx2 & MASK], _mm_set_epi64x(ah2, al2)); + cx3 = soft_aesenc((uint32_t*)&l3[idx3 & MASK], _mm_set_epi64x(ah3, al3)); } else { cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]); @@ -909,11 +910,11 @@ public: __m128i cx4; if (SOFT_AES) { - cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0)); - cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1)); - cx2 = soft_aesenc(cx2, _mm_set_epi64x(ah2, al2)); - cx3 = soft_aesenc(cx3, _mm_set_epi64x(ah3, al3)); - cx4 = soft_aesenc(cx4, _mm_set_epi64x(ah4, al4)); + cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0)); + cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1)); + cx2 = soft_aesenc((uint32_t*)&l2[idx2 & MASK], _mm_set_epi64x(ah2, al2)); + cx3 = soft_aesenc((uint32_t*)&l3[idx3 & MASK], _mm_set_epi64x(ah3, al3)); + cx4 = soft_aesenc((uint32_t*)&l4[idx4 & MASK], _mm_set_epi64x(ah4, al4)); } else { cx0 = _mm_load_si128((__m128i*) &l0[idx0 & MASK]); cx1 = _mm_load_si128((__m128i*) &l1[idx1 & MASK]);