Added support for write custom MSR.

This commit is contained in:
XMRig 2019-12-17 02:27:07 +07:00
parent 33e7a54c29
commit 8bef964f68
No known key found for this signature in database
GPG key ID: 446A53638BE94409
15 changed files with 408 additions and 106 deletions

View file

@ -139,7 +139,13 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
m_aes = true;
if (m_vendor == VENDOR_AMD) {
m_assembly = (data.ext_family >= 23) ? Assembly::RYZEN : Assembly::BULLDOZER;
if (data.ext_family >= 23) {
m_assembly = Assembly::RYZEN;
m_msrMod = MSR_MOD_RYZEN;
}
else {
m_assembly = Assembly::BULLDOZER;
}
}
else if (m_vendor == VENDOR_INTEL) {
m_assembly = Assembly::INTEL;

View file

@ -46,6 +46,7 @@ protected:
inline bool hasOneGbPages() const override { return m_pdpe1gb; }
inline const char *backend() const override { return m_backend; }
inline const char *brand() const override { return m_brand; }
inline MsrMod msrMod() const override { return m_msrMod; }
inline size_t cores() const override { return m_cores; }
inline size_t L2() const override { return m_L2; }
inline size_t L3() const override { return m_L3; }
@ -62,6 +63,7 @@ private:
char m_backend[32]{};
char m_brand[64 + 5]{};
const bool m_pdpe1gb = false;
MsrMod m_msrMod = MSR_MOD_NONE;
size_t m_cores = 0;
size_t m_L2 = 0;
size_t m_L3 = 0;

View file

@ -175,11 +175,18 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
cpuid(PROCESSOR_INFO, data);
const int32_t family = get_masked(data[EAX_Reg], 12, 8) + get_masked(data[EAX_Reg], 28, 20);
m_assembly = family >= 23 ? Assembly::RYZEN : Assembly::BULLDOZER;
if (family >= 23) {
m_assembly = Assembly::RYZEN;
m_msrMod = MSR_MOD_RYZEN;
}
else {
m_assembly = Assembly::BULLDOZER;
}
}
else if (memcmp(vendor, "GenuineIntel", 12) == 0) {
m_vendor = VENDOR_INTEL;
m_assembly = Assembly::INTEL;
m_msrMod = MSR_MOD_INTEL;
}
}
# endif

View file

@ -46,6 +46,7 @@ protected:
inline bool hasAVX2() const override { return m_avx2; }
inline bool hasOneGbPages() const override { return m_pdpe1gb; }
inline const char *brand() const override { return m_brand; }
inline MsrMod msrMod() const override { return m_msrMod; }
inline size_t cores() const override { return 0; }
inline size_t L2() const override { return 0; }
inline size_t L3() const override { return 0; }
@ -63,6 +64,7 @@ private:
bool m_aes = false;
const bool m_avx2 = false;
const bool m_pdpe1gb = false;
MsrMod m_msrMod = MSR_MOD_NONE;
Vendor m_vendor = VENDOR_UNKNOWN;
};