xmrig v2.12.0 rebase

CHANGELOG.md

@@ -1,3 +1,11 @@
+# v2.12.0
+- [#929](https://github.com/xmrig/xmrig/pull/929) Added support for new algorithm `cryptonight/wow`, short alias `cn/wow` (also known as CryptonightR), for upcoming [Wownero](http://wownero.org) fork on February 14.
+
+# v2.11.0
+- [#928](https://github.com/xmrig/xmrig/issues/928) Added support for new algorithm `cryptonight/gpu`, short alias `cn/gpu` (original name `cryptonight-gpu`), for upcoming [Ryo currency](https://ryo-currency.com) fork on February 14.
+- [#749](https://github.com/xmrig/xmrig/issues/749) Added support for detect hardware AES in runtime on ARMv8 platforms.
+- [#292](https://github.com/xmrig/xmrig/issues/292) Fixed build on ARMv8 platforms if compiler not support hardware AES.
+
 # v2.10.0
 - [#904](https://github.com/xmrig/xmrig/issues/904) Added new algorithm `cn-pico/trtl` (aliases `cryptonight-turtle`, `cn-trtl`) for upcoming TurtleCoin (TRTL) fork.
 - Default value for option `max-cpu-usage` changed to `100` also this option now deprecated.

CMakeLists.txt

@@ -5,11 +5,13 @@ option(WITH_LIBCPUID  "Use Libcpuid" ON)
 option(WITH_AEON      "CryptoNight-Lite support" ON)
 option(WITH_SUMO      "CryptoNight-Heavy support" ON)
 option(WITH_CN_PICO   "CryptoNight-Pico support" ON)
+option(WITH_CN_GPU    "CryptoNight-GPU support" ON)
 option(WITH_HTTPD     "HTTP REST API" ON)
 option(WITH_DEBUG_LOG "Enable debug log output" OFF)
 option(WITH_TLS       "Enable OpenSSL support" ON)
 option(WITH_ASM       "Enable ASM PoW implementations" ON)
 option(BUILD_STATIC   "Build static binary" OFF)
+option(ARM_TARGET     "Force use specific ARM target 8 or 7" 0)
 
 include (CheckIncludeFile)
 include (cmake/cpu.cmake)
@@ -85,6 +87,7 @@ set(HEADERS_CRYPTO
     src/crypto/hash.h
     src/crypto/skein_port.h
     src/crypto/soft_aes.h
+    src/crypto/asm/CryptonightR_template.h
    )
 
 if (XMRIG_ARM)
@@ -135,6 +138,7 @@ set(SOURCES_CRYPTO
     src/crypto/c_blake256.c
     src/crypto/c_jh.c
     src/crypto/c_skein.c
+    src/crypto/CryptonightR_gen.cpp
    )
 
 if (WIN32)
@@ -202,6 +206,7 @@ endif()
 
 include(cmake/OpenSSL.cmake)
 include(cmake/asm.cmake)
+include(cmake/cn-gpu.cmake)
 
 CHECK_INCLUDE_FILE (syslog.h HAVE_SYSLOG_H)
 if (HAVE_SYSLOG_H)
@@ -264,5 +269,5 @@ if (WITH_DEBUG_LOG)
     add_definitions(/DAPP_DEBUG)
 endif()
 
-add_executable(${CMAKE_PROJECT_NAME} ${HEADERS} ${SOURCES} ${SOURCES_OS} ${SOURCES_CPUID} ${HEADERS_CRYPTO} ${SOURCES_CRYPTO} ${SOURCES_SYSLOG} ${HTTPD_SOURCES} ${TLS_SOURCES} ${XMRIG_ASM_SOURCES})
+add_executable(${CMAKE_PROJECT_NAME} ${HEADERS} ${SOURCES} ${SOURCES_OS} ${SOURCES_CPUID} ${HEADERS_CRYPTO} ${SOURCES_CRYPTO} ${SOURCES_SYSLOG} ${HTTPD_SOURCES} ${TLS_SOURCES} ${XMRIG_ASM_SOURCES} ${CN_GPU_SOURCES})
 target_link_libraries(${CMAKE_PROJECT_NAME} ${XMRIG_ASM_LIBRARY} ${OPENSSL_LIBRARIES} ${UV_LIBRARIES} ${MHD_LIBRARY} ${EXTRA_LIBS} ${CPUID_LIB})

cmake/asm.cmake

@@ -5,9 +5,15 @@ if (WITH_ASM AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
         enable_language(ASM_MASM)
 
         if (MSVC_TOOLSET_VERSION GREATER_EQUAL 141)
-            set(XMRIG_ASM_FILE "src/crypto/asm/cn_main_loop.asm")
+            set(XMRIG_ASM_FILE
+                "src/crypto/asm/cn_main_loop.asm"
+                "src/crypto/asm/CryptonightR_template.asm"
+            )
         else()
-            set(XMRIG_ASM_FILE "src/crypto/asm/win64/cn_main_loop.asm")
+            set(XMRIG_ASM_FILE
+                "src/crypto/asm/win64/cn_main_loop.asm"
+                "src/crypto/asm/win64/CryptonightR_template.asm"
+            )
         endif()
 
         set_property(SOURCE ${XMRIG_ASM_FILE} PROPERTY ASM_MASM)
@@ -15,9 +21,15 @@ if (WITH_ASM AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
         enable_language(ASM)
 
         if (WIN32 AND CMAKE_C_COMPILER_ID MATCHES GNU)
-            set(XMRIG_ASM_FILE "src/crypto/asm/win64/cn_main_loop.S")
+            set(XMRIG_ASM_FILE
+                "src/crypto/asm/win64/cn_main_loop.S"
+                "src/crypto/asm/win64/CryptonightR_template.S"
+            )
         else()
-            set(XMRIG_ASM_FILE "src/crypto/asm/cn_main_loop.S")
+            set(XMRIG_ASM_FILE
+                "src/crypto/asm/cn_main_loop.S"
+                "src/crypto/asm/CryptonightR_template.S"
+            )
         endif()
 
         set_property(SOURCE ${XMRIG_ASM_FILE} PROPERTY C)

cmake/cn-gpu.cmake

@@ -0,0 +1,23 @@
+if (WITH_CN_GPU AND CMAKE_SIZEOF_VOID_P EQUAL 8)
+
+    if (XMRIG_ARM)
+        set(CN_GPU_SOURCES src/crypto/cn_gpu_arm.cpp)
+
+        if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
+            set_source_files_properties(src/crypto/cn_gpu_arm.cpp PROPERTIES COMPILE_FLAGS "-O3")
+        endif()
+    else()
+        set(CN_GPU_SOURCES src/crypto/cn_gpu_avx.cpp src/crypto/cn_gpu_ssse3.cpp)
+
+        if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
+            set_source_files_properties(src/crypto/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "-O3 -mavx2")
+            set_source_files_properties(src/crypto/cn_gpu_ssse3.cpp PROPERTIES COMPILE_FLAGS "-O3")
+        elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
+            set_source_files_properties(src/crypto/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "/arch:AVX")
+        endif()
+    endif()
+else()
+    set(CN_GPU_SOURCES "")
+
+    add_definitions(/DXMRIG_NO_CN_GPU)
+endif()

cmake/cpu.cmake

@@ -7,19 +7,37 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(x86_64|AMD64)$")
     add_definitions(/DRAPIDJSON_SSE2)
 endif()
 
-
+if (NOT ARM_TARGET)
-if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64)$")
+    if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a)$")
-    set(XMRIG_ARM     ON)
+        set(ARM_TARGET 8)
-    set(XMRIG_ARMv8   ON)
+    elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l)$")
-    set(WITH_LIBCPUID OFF)
+        set(ARM_TARGET 7)
-
+    endif()
-    add_definitions(/DXMRIG_ARM)
+endif()
-    add_definitions(/DXMRIG_ARMv8)
+
-elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l)$")
+if (ARM_TARGET AND ARM_TARGET GREATER 6)
-    set(XMRIG_ARM     ON)
+    set(XMRIG_ARM     ON)
-    set(XMRIG_ARMv7   ON)
+    set(WITH_LIBCPUID OFF)
-    set(WITH_LIBCPUID OFF)
+    add_definitions(/DXMRIG_ARM)
-
+
-    add_definitions(/DXMRIG_ARM)
+    message(STATUS "Use ARM_TARGET=${ARM_TARGET} (${CMAKE_SYSTEM_PROCESSOR})")
-    add_definitions(/DXMRIG_ARMv7)
+
+    include(CheckCXXCompilerFlag)
+
+    if (ARM_TARGET EQUAL 8)
+        set(XMRIG_ARMv8 ON)
+        add_definitions(/DXMRIG_ARMv8)
+
+        CHECK_CXX_COMPILER_FLAG(-march=armv8-a+crypto XMRIG_ARM_CRYPTO)
+
+        if (XMRIG_ARM_CRYPTO)
+            add_definitions(/DXMRIG_ARM_CRYPTO)
+            set(ARM8_CXX_FLAGS "-march=armv8-a+crypto")
+        else()
+            set(ARM8_CXX_FLAGS "-march=armv8-a")
+        endif()
+    elseif (ARM_TARGET EQUAL 7)
+        set(XMRIG_ARMv7 ON)
+        add_definitions(/DXMRIG_ARMv7)
+    endif()
 endif()

cmake/flags.cmake

@@ -19,8 +19,8 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
     set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -s")
 
     if (XMRIG_ARMv8)
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto")
+        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${ARM8_CXX_FLAGS}")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto -flax-vector-conversions")
+        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${ARM8_CXX_FLAGS} -flax-vector-conversions")
     elseif (XMRIG_ARMv7)
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfpu=neon -flax-vector-conversions")
@@ -60,8 +60,8 @@ elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang)
     set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -funroll-loops -fmerge-all-constants")
 
     if (XMRIG_ARMv8)
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv8-a+crypto")
+        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${ARM8_CXX_FLAGS}")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv8-a+crypto")
+        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${ARM8_CXX_FLAGS}")
     elseif (XMRIG_ARMv7)
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon -march=${CMAKE_SYSTEM_PROCESSOR}")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfpu=neon -march=${CMAKE_SYSTEM_PROCESSOR}")

src/Mem.cpp

@@ -51,6 +51,12 @@ MemInfo Mem::create(cryptonight_ctx **ctx, xmrig::Algo algorithm, size_t count)
         cryptonight_ctx *c = static_cast<cryptonight_ctx *>(_mm_malloc(sizeof(cryptonight_ctx), 4096));
         c->memory          = info.memory + (i * cn_select_memory(algorithm));
 
+        uint8_t* p = reinterpret_cast<uint8_t*>(allocateExecutableMemory(0x4000));
+        c->generated_code  = reinterpret_cast<cn_mainloop_fun_ms_abi>(p);
+        c->generated_code_double = reinterpret_cast<cn_mainloop_double_fun_ms_abi>(p + 0x2000);
+        c->generated_code_height = (uint64_t)(-1);
+        c->generated_code_double_height = (uint64_t)(-1);
+
         ctx[i] = c;
     }
 

src/Summary.cpp

@@ -4,9 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018      SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -74,18 +74,25 @@ static void print_cpu(xmrig::Config *config)
     using namespace xmrig;
 
     if (config->isColors()) {
-        Log::i()->text(GREEN_BOLD(" * ") WHITE_BOLD("%-13s%s (%d)") " %sx64 %sAES",
+        Log::i()->text(GREEN_BOLD(" * ") WHITE_BOLD("%-13s%s (%d)") " %sx64 %sAES %sAVX2",
                        "CPU",
                        Cpu::info()->brand(),
                        Cpu::info()->sockets(),
-                       Cpu::info()->isX64() ? "\x1B[1;32m" : "\x1B[1;31m-",
+                       Cpu::info()->isX64()   ? "\x1B[1;32m" : "\x1B[1;31m-",
-                       Cpu::info()->hasAES() ? "\x1B[1;32m" : "\x1B[1;31m-");
+                       Cpu::info()->hasAES()  ? "\x1B[1;32m" : "\x1B[1;31m-",
+                       Cpu::info()->hasAVX2() ? "\x1B[1;32m" : "\x1B[1;31m-");
 #       ifndef XMRIG_NO_LIBCPUID
         Log::i()->text(GREEN_BOLD(" * ") WHITE_BOLD("%-13s%.1f MB/%.1f MB"), "CPU L2/L3", Cpu::info()->L2() / 1024.0, Cpu::info()->L3() / 1024.0);
 #       endif
     }
     else {
-        Log::i()->text(" * %-13s%s (%d) %sx64 %sAES", "CPU", Cpu::info()->brand(), Cpu::info()->sockets(), Cpu::info()->isX64() ? "" : "-", Cpu::info()->hasAES() ? "" : "-");
+        Log::i()->text(" * %-13s%s (%d) %sx64 %sAES %sAVX2",
+                       "CPU",
+                       Cpu::info()->brand(),
+                       Cpu::info()->sockets(),
+                       Cpu::info()->isX64()   ? "" : "-",
+                       Cpu::info()->hasAES()  ? "" : "-",
+                       Cpu::info()->hasAVX2() ? "" : "-");
 #       ifndef XMRIG_NO_LIBCPUID
         Log::i()->text(" * %-13s%.1f MB/%.1f MB", "CPU L2/L3", Cpu::info()->L2() / 1024.0, Cpu::info()->L3() / 1024.0);
 #       endif

src/common/cpu/BasicCpuInfo.cpp

@@ -4,8 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +36,10 @@
 #   define bit_AES (1 << 25)
 #endif
 
+#ifndef bit_AVX2
+#   define bit_AVX2 (1 << 5)
+#endif
+
 
 #include "common/cpu/BasicCpuInfo.h"
 
@@ -93,9 +98,19 @@ static inline bool has_aes_ni()
 }
 
 
+static inline bool has_avx2()
+{
+    int32_t cpu_info[4] = { 0 };
+    cpuid(EXTENDED_FEATURES, cpu_info);
+
+    return (cpu_info[EBX_Reg] & bit_AVX2) != 0;
+}
+
+
 xmrig::BasicCpuInfo::BasicCpuInfo() :
     m_assembly(ASM_NONE),
     m_aes(has_aes_ni()),
+    m_avx2(has_avx2()),
     m_brand(),
     m_threads(std::thread::hardware_concurrency())
 {

src/common/cpu/BasicCpuInfo.h

@@ -4,8 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -41,6 +42,7 @@ protected:
 
     inline Assembly assembly() const override       { return m_assembly; }
     inline bool hasAES() const override             { return m_aes; }
+    inline bool hasAVX2() const override            { return m_avx2; }
     inline bool isSupported() const override        { return true; }
     inline const char *brand() const override       { return m_brand; }
     inline int32_t cores() const override           { return -1; }
@@ -59,6 +61,7 @@ protected:
 private:
     Assembly m_assembly;
     bool m_aes;
+    bool m_avx2;
     char m_brand[64];
     int32_t m_threads;
 };

src/common/cpu/BasicCpuInfo_arm.cpp

@@ -4,8 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -24,19 +25,29 @@
 #include <string.h>
 #include <thread>
 
+#if __ARM_FEATURE_CRYPTO
+#   include <sys/auxv.h>
+#   include <asm/hwcap.h>
+#endif
+
 
 #include "common/cpu/BasicCpuInfo.h"
 
 
 xmrig::BasicCpuInfo::BasicCpuInfo() :
     m_aes(false),
+    m_avx2(false),
     m_brand(),
     m_threads(std::thread::hardware_concurrency())
 {
-    memcpy(m_brand, "Unknown", 7);
+#   ifdef XMRIG_ARMv8
+    memcpy(m_brand, "ARMv8", 5);
+#   else
+    memcpy(m_brand, "ARMv7", 5);
+#   endif
 
 #   if __ARM_FEATURE_CRYPTO
-    m_aes = true;
+    m_aes = getauxval(AT_HWCAP) & HWCAP_AES;
 #   endif
 }
 

src/common/crypto/Algorithm.cpp

@@ -65,6 +65,7 @@ static AlgoData const algorithms[] = {
     { "cryptonight/2",         "cn/2",         xmrig::CRYPTONIGHT,       xmrig::VARIANT_2    },
     { "cryptonight/half",      "cn/half",      xmrig::CRYPTONIGHT,       xmrig::VARIANT_HALF },
     { "cryptonight/xtlv9",     "cn/xtlv9",     xmrig::CRYPTONIGHT,       xmrig::VARIANT_HALF },
+    { "cryptonight/wow",       "cn/wow",       xmrig::CRYPTONIGHT,       xmrig::VARIANT_WOW  },
 
 #   ifndef XMRIG_NO_AEON
     { "cryptonight-lite",      "cn-lite",      xmrig::CRYPTONIGHT_LITE,  xmrig::VARIANT_AUTO },
@@ -87,6 +88,10 @@ static AlgoData const algorithms[] = {
     { "cryptonight-ultralite",  "cn-ultralite",  xmrig::CRYPTONIGHT_PICO, xmrig::VARIANT_TRTL },
     { "cryptonight_turtle",     "cn_turtle",     xmrig::CRYPTONIGHT_PICO, xmrig::VARIANT_TRTL },
 #   endif
+
+#   ifndef XMRIG_NO_CN_GPU
+    { "cryptonight/gpu",        "cn/gpu",  xmrig::CRYPTONIGHT, xmrig::VARIANT_GPU },
+#   endif
 };
 
 
@@ -106,6 +111,8 @@ static AlgoData const xmrStakAlgorithms[] = {
     { "cryptonight_masari",      nullptr, xmrig::CRYPTONIGHT,       xmrig::VARIANT_MSR  },
     { "cryptonight-bittube2",    nullptr, xmrig::CRYPTONIGHT_HEAVY, xmrig::VARIANT_TUBE }, // bittube-miner
     { "cryptonight_alloy",       nullptr, xmrig::CRYPTONIGHT,       xmrig::VARIANT_XAO  }, // xmr-stak-alloy
+    { "cryptonight_turtle",      nullptr, xmrig::CRYPTONIGHT_PICO,  xmrig::VARIANT_TRTL },
+    { "cryptonight_gpu",         nullptr, xmrig::CRYPTONIGHT,       xmrig::VARIANT_GPU  },
 };
 #endif
 
@@ -121,7 +128,9 @@ static const char *variants[] = {
     "rto",
     "2",
     "half",
-    "trtl"
+    "trtl",
+    "gpu",
+    "wow",
 };
 
 
@@ -286,6 +295,8 @@ const char *xmrig::Algorithm::perfAlgoName(const xmrig::PerfAlgo pa) {
         "cn",
         "cn/2",
         "cn/half",
+        "cn/gpu",
+        "cn/wow",
         "cn-lite",
         "cn-heavy",
         "cn-pico",
@@ -308,6 +319,14 @@ xmrig::Algorithm::Algorithm(const xmrig::PerfAlgo pa) {
            m_algo    = xmrig::CRYPTONIGHT;
            m_variant = xmrig::VARIANT_HALF;
            break;
+       case PA_CN_GPU:
+           m_algo    = xmrig::CRYPTONIGHT;
+           m_variant = xmrig::VARIANT_GPU;
+           break;
+       case PA_CN_WOW:
+           m_algo    = xmrig::CRYPTONIGHT;
+           m_variant = xmrig::VARIANT_WOW;
+           break;
        case PA_CN_LITE:
            m_algo    = xmrig::CRYPTONIGHT_LITE;
            m_variant = xmrig::VARIANT_1;
@@ -333,6 +352,8 @@ xmrig::PerfAlgo xmrig::Algorithm::perf_algo() const {
            switch (m_variant) {
                case VARIANT_2:    return PA_CN2;
                case VARIANT_HALF: return PA_CN_HALF;
+               case VARIANT_GPU:  return PA_CN_GPU;
+               case VARIANT_WOW:  return PA_CN_WOW;
                default:           return PA_CN;
            }
        case CRYPTONIGHT_LITE:  return PA_CN_LITE;

src/common/interfaces/ICpuInfo.h

@@ -4,7 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2016-2018 XMRig       <support@xmrig.com>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -40,6 +42,7 @@ public:
     virtual ~ICpuInfo() {}
 
     virtual bool hasAES() const                                               = 0;
+    virtual bool hasAVX2() const                                              = 0;
     virtual bool isSupported() const                                          = 0;
     virtual bool isX64() const                                                = 0;
     virtual const char *brand() const                                         = 0;

src/common/interfaces/IStrategy.h

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -21,8 +22,8 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __ISTRATEGY_H__
+#ifndef XMRIG_ISTRATEGY_H
-#define __ISTRATEGY_H__
+#define XMRIG_ISTRATEGY_H
 
 
 #include <stdint.h>
@@ -31,18 +32,24 @@
 class JobResult;
 
 
+namespace xmrig {
+    class Algorithm;
+}
+
+
 class IStrategy
 {
 public:
     virtual ~IStrategy() {}
 
-    virtual bool isActive() const                   = 0;
+    virtual bool isActive() const                      = 0;
-    virtual int64_t submit(const JobResult &result) = 0;
+    virtual int64_t submit(const JobResult &result)    = 0;
-    virtual void connect()                          = 0;
+    virtual void connect()                             = 0;
-    virtual void resume()                           = 0;
+    virtual void resume()                              = 0;
-    virtual void stop()                             = 0;
+    virtual void setAlgo(const xmrig::Algorithm &algo) = 0;
-    virtual void tick(uint64_t now)                 = 0;
+    virtual void stop()                                = 0;
+    virtual void tick(uint64_t now)                    = 0;
 };
 
 
-#endif // __ISTRATEGY_H__
+#endif // XMRIG_ISTRATEGY_H

src/common/log/Log.h

@@ -77,6 +77,7 @@ private:
 #define CYAN(x)         "\x1B[0;36m" x "\x1B[0m"
 #define WHITE_BOLD(x)   "\x1B[1;37m" x "\x1B[0m"
 #define WHITE(x)        "\x1B[0;37m" x "\x1B[0m"
+#define GRAY(x)         "\x1B[1;30m" x "\x1B[0m"
 
 
 #define LOG_ERR(x, ...)    Log::i()->message(ILogBackend::ERR,     x, ##__VA_ARGS__)

src/common/net/Client.cpp

@@ -221,6 +221,10 @@ int64_t Client::submit(const JobResult &result)
     }
 #   endif
 
+    if (m_job.algorithm().variant() == xmrig::VARIANT_WOW && m_job.id() != result.jobId) {
+        return -1;
+    }
+
     using namespace rapidjson;
 
 #   ifdef XMRIG_PROXY_PROJECT
@@ -356,6 +360,14 @@ bool Client::parseJob(const rapidjson::Value &params, int *code)
         }
     }
 
+    if (params.HasMember("height")) {
+        const rapidjson::Value &variant = params["height"];
+
+        if (variant.IsUint64()) {
+            job.setHeight(variant.GetUint64());
+        }
+    }
+
     if (!verifyAlgorithm(job.algorithm())) {
         *code = 6;
 

src/common/net/Job.cpp

@@ -32,7 +32,7 @@
 #include "common/net/Job.h"
 
 
-static inline unsigned char hf_hex2bin(char c, bool &err)
+unsigned char hf_hex2bin(char c, bool &err)
 {
     if (c >= '0' && c <= '9') {
         return c - '0';
@@ -49,7 +49,7 @@ static inline unsigned char hf_hex2bin(char c, bool &err)
 }
 
 
-static inline char hf_bin2hex(unsigned char c)
+char hf_bin2hex(unsigned char c)
 {
     if (c <= 0x9) {
         return '0' + c;
@@ -67,7 +67,8 @@ Job::Job() :
     m_size(0),
     m_diff(0),
     m_target(0),
-    m_blob()
+    m_blob(),
+    m_height(0)
 {
 }
 
@@ -81,6 +82,7 @@ Job::Job(int poolId, bool nicehash, const xmrig::Algorithm &algorithm, const xmr
     m_diff(0),
     m_target(0),
     m_blob(),
+    m_height(0),
     m_algorithm(algorithm),
     m_clientId(clientId)
 {
@@ -133,6 +135,9 @@ bool Job::setBlob(const char *blob)
         else if (m_algorithm.variant() == xmrig::VARIANT_MSR && m_blob[0] >= 8) {
             m_algorithm.setVariant(xmrig::VARIANT_HALF);
         }
+        else if (m_algorithm.variant() == xmrig::VARIANT_WOW && m_blob[0] < 11) {
+            m_algorithm.setVariant(xmrig::VARIANT_2);
+        }
     }
 
 #   ifdef XMRIG_PROXY_PROJECT
@@ -202,6 +207,12 @@ void Job::setAlgorithm(const char *algo)
 }
 
 
+void Job::setHeight(uint64_t height)
+{
+    m_height = height;
+}
+
+
 bool Job::fromHex(const char* in, unsigned int len, unsigned char* out)
 {
     bool error = false;

src/common/net/Job.h

@@ -54,6 +54,7 @@ public:
     // for algo benchmarking to set PoW variant
     void setAlgorithm(const xmrig::Algorithm& algorithm) { m_algorithm = algorithm; }
     void setAlgorithm(const char *algo);
+    void setHeight(uint64_t height);
 
     inline bool isNicehash() const                    { return m_nicehash; }
     inline bool isValid() const                       { return m_size > 0 && m_diff > 0; }
@@ -69,6 +70,7 @@ public:
     inline uint32_t *nonce()                          { return reinterpret_cast<uint32_t*>(m_blob + 39); }
     inline uint32_t diff() const                      { return static_cast<uint32_t>(m_diff); }
     inline uint64_t target() const                    { return m_target; }
+    inline uint64_t height() const                    { return m_height; }
     inline void reset()                               { m_size = 0; m_diff = 0; }
     inline void setClientId(const xmrig::Id &id)      { m_clientId = id; }
     inline void setPoolId(int poolId)                 { m_poolId = poolId; }
@@ -104,6 +106,7 @@ private:
     uint64_t m_diff;
     uint64_t m_target;
     uint8_t m_blob[kMaxBlobSize];
+    uint64_t m_height;
     xmrig::Algorithm m_algorithm;
     xmrig::Id m_clientId;
     xmrig::Id m_id;

src/common/net/Pool.cpp

@@ -4,7 +4,7 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
  * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
  * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  * Copyright 2018-2019 MoneroOcean <https://github.com/MoneroOcean>, <support@moneroocean.stream>
@@ -60,6 +60,8 @@ Pool::Pool() :
     m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT, xmrig::VARIANT_XAO));
     m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT, xmrig::VARIANT_RTO));
     m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT, xmrig::VARIANT_HALF));
+    m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT, xmrig::VARIANT_GPU));
+    m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT, xmrig::VARIANT_WOW));
 
     m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT_LITE, xmrig::VARIANT_1));
     m_algorithms.push_back(xmrig::Algorithm(xmrig::CRYPTONIGHT_LITE, xmrig::VARIANT_0));
@@ -223,10 +225,10 @@ rapidjson::Value Pool::toJSON(rapidjson::Document &doc) const
 
     Value obj(kObjectType);
 
-    obj.AddMember("url",    StringRef(url()), allocator);
+    obj.AddMember("url",    m_url.toJSON(), allocator);
-    obj.AddMember("user",   StringRef(user()), allocator);
+    obj.AddMember("user",   m_user.toJSON(), allocator);
-    obj.AddMember("pass",   StringRef(password()), allocator);
+    obj.AddMember("pass",   m_password.toJSON(), allocator);
-    obj.AddMember("rig-id", rigId() ? Value(StringRef(rigId())).Move() : Value(kNullType).Move(), allocator);
+    obj.AddMember("rig-id", m_rigId.toJSON(), allocator);
 
 #   ifndef XMRIG_PROXY_PROJECT
     obj.AddMember("nicehash", isNicehash(), allocator);
@@ -243,17 +245,20 @@ rapidjson::Value Pool::toJSON(rapidjson::Document &doc) const
     case xmrig::VARIANT_AUTO:
     case xmrig::VARIANT_0:
     case xmrig::VARIANT_1:
-    case xmrig::VARIANT_2:
         obj.AddMember("variant", m_algorithm.variant(), allocator);
         break;
 
+    case xmrig::VARIANT_2:
+        obj.AddMember("variant", 2, allocator);
+        break;
+
     default:
         obj.AddMember("variant", StringRef(m_algorithm.variantName()), allocator);
         break;
     }
 
     obj.AddMember("tls",             isTLS(), allocator);
-    obj.AddMember("tls-fingerprint", fingerprint() ? Value(StringRef(fingerprint())).Move() : Value(kNullType).Move(), allocator);
+    obj.AddMember("tls-fingerprint", m_fingerprint.toJSON(), allocator);
 
     return obj;
 }

src/common/net/strategies/FailoverStrategy.cpp

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -76,6 +77,14 @@ void FailoverStrategy::resume()
 }
 
 
+void FailoverStrategy::setAlgo(const xmrig::Algorithm &algo)
+{
+    for (Client *client : m_pools) {
+        client->setAlgo(algo);
+    }
+}
+
+
 void FailoverStrategy::stop()
 {
     for (size_t i = 0; i < m_pools.size(); ++i) {

src/common/net/strategies/FailoverStrategy.h

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -21,8 +22,8 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __FAILOVERSTRATEGY_H__
+#ifndef XMRIG_FAILOVERSTRATEGY_H
-#define __FAILOVERSTRATEGY_H__
+#define XMRIG_FAILOVERSTRATEGY_H
 
 
 #include <vector>
@@ -42,7 +43,7 @@ class FailoverStrategy : public IStrategy, public IClientListener
 {
 public:
     FailoverStrategy(const std::vector<Pool> &urls, int retryPause, int retries, IStrategyListener *listener, bool quiet = false);
-    ~FailoverStrategy();
+    ~FailoverStrategy() override;
 
 public:
     inline bool isActive() const override  { return m_active >= 0; }
@@ -50,6 +51,7 @@ public:
     int64_t submit(const JobResult &result) override;
     void connect() override;
     void resume() override;
+    void setAlgo(const xmrig::Algorithm &algo) override;
     void stop() override;
     void tick(uint64_t now) override;
 
@@ -71,4 +73,4 @@ private:
     std::vector<Client*> m_pools;
 };
 
-#endif /* __FAILOVERSTRATEGY_H__ */
+#endif /* XMRIG_FAILOVERSTRATEGY_H */

src/common/net/strategies/SinglePoolStrategy.cpp

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -68,6 +69,12 @@ void SinglePoolStrategy::resume()
 }
 
 
+void SinglePoolStrategy::setAlgo(const xmrig::Algorithm &algo)
+{
+    m_client->setAlgo(algo);
+}
+
+
 void SinglePoolStrategy::stop()
 {
     m_client->disconnect();

src/common/net/strategies/SinglePoolStrategy.h

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -21,8 +22,8 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __SINGLEPOOLSTRATEGY_H__
+#ifndef XMRIG_SINGLEPOOLSTRATEGY_H
-#define __SINGLEPOOLSTRATEGY_H__
+#define XMRIG_SINGLEPOOLSTRATEGY_H
 
 
 #include "common/interfaces/IClientListener.h"
@@ -31,14 +32,14 @@
 
 class Client;
 class IStrategyListener;
-class Url;
+class Pool;
 
 
 class SinglePoolStrategy : public IStrategy, public IClientListener
 {
 public:
     SinglePoolStrategy(const Pool &pool, int retryPause, int retries, IStrategyListener *listener, bool quiet = false);
-    ~SinglePoolStrategy();
+    ~SinglePoolStrategy() override;
 
 public:
     inline bool isActive() const override  { return m_active; }
@@ -46,6 +47,7 @@ public:
     int64_t submit(const JobResult &result) override;
     void connect() override;
     void resume() override;
+    void setAlgo(const xmrig::Algorithm &algo) override;
     void stop() override;
     void tick(uint64_t now) override;
 
@@ -61,4 +63,4 @@ private:
     IStrategyListener *m_listener;
 };
 
-#endif /* __SINGLEPOOLSTRATEGY_H__ */
+#endif /* XMRIG_SINGLEPOOLSTRATEGY_H */

src/common/xmrig.h

@@ -37,18 +37,20 @@ enum Algo {
     CRYPTONIGHT_LITE,   /* CryptoNight (1 MB) */
     CRYPTONIGHT_HEAVY,  /* CryptoNight (4 MB) */
     CRYPTONIGHT_PICO,   /* CryptoNight (256 KB) */
-    CRYPTONIGHT_MAX
+    ALGO_MAX
 };
 
 // algorithms that can has different performance
 enum PerfAlgo {
     PA_INVALID = -1,
-    PA_CN,       /* CryptoNight (Monero) */
+    PA_CN,       /* cn/0 (Monero) */
-    PA_CN2,      /* CryptoNight/2 (Monero) */
+    PA_CN2,      /* cn/2 (Monero) */
-    PA_CN_HALF,  /* CryptoNight-Half (Masari) */
+    PA_CN_HALF,  /* cn/half (MSR) */
-    PA_CN_LITE,  /* CryptoNight-Lite (AEON) */
+    PA_CN_GPU,   /* cn/gpu (RYO) */
-    PA_CN_HEAVY, /* CryptoNight-Heavy (SUMO) */
+    PA_CN_WOW,   /* cn/wow (WOW) */
-    PA_CN_PICO,  /* CryptoNight-Pico (TRTL) */
+    PA_CN_LITE,  /* cn-lite/1 (AEON) */
+    PA_CN_HEAVY, /* cn-heavy/0 (LOKI) */
+    PA_CN_PICO,  /* cn-pico/trtl (TRTL) */
     PA_MAX
 };
 
@@ -85,6 +87,8 @@ enum Variant {
     VARIANT_2    = 8,  // CryptoNight variant 2
     VARIANT_HALF = 9,  // CryptoNight variant 2 with half iterations (Masari/Stellite)
     VARIANT_TRTL = 10, // CryptoNight Turtle (TRTL)
+    VARIANT_GPU  = 11, // CryptoNight-GPU (Ryo)
+    VARIANT_WOW  = 12, // CryptoNightR (Wownero)
     VARIANT_MAX
 };
 

src/core/Config.cpp

@@ -130,7 +130,7 @@ void xmrig::Config::getJSON(rapidjson::Document &doc) const
 
     // save extended "threads" based on m_threads
     Value threads(kObjectType);
-    for (int a = 0; a != xmrig::Algo::CRYPTONIGHT_MAX; ++ a) {
+    for (int a = 0; a != xmrig::Algo::ALGO_MAX; ++ a) {
         const xmrig::Algo algo = static_cast<xmrig::Algo>(a);
         Value key(xmrig::Algorithm::perfAlgoName(xmrig::Algorithm(algo).perf_algo()), allocator);
         if (threadsMode(algo) != Simple) {
@@ -186,7 +186,7 @@ bool xmrig::Config::finalize()
     }
 
     // auto configure m_threads
-    for (int a = 0; a != xmrig::Algo::CRYPTONIGHT_MAX; ++ a) {
+    for (int a = 0; a != xmrig::Algo::ALGO_MAX; ++ a) {
         const xmrig::Algo algo = static_cast<xmrig::Algo>(a);
         if (!m_threads[algo].cpu.empty()) {
             m_threads[algo].mode = Advanced;
@@ -349,7 +349,7 @@ void xmrig::Config::parseJSON(const rapidjson::Document &doc)
         parseThreadsJSON(threads, m_algorithm.algo());
     } else if (threads.IsObject()) {
         // parse new specific perf algo threads
-        for (int a = 0; a != xmrig::Algo::CRYPTONIGHT_MAX; ++ a) {
+        for (int a = 0; a != xmrig::Algo::ALGO_MAX; ++ a) {
             const xmrig::Algo algo = static_cast<xmrig::Algo>(a);
             const rapidjson::Value &threads2 = threads[xmrig::Algorithm::perfAlgoName(xmrig::Algorithm(algo).perf_algo())];
             if (threads2.IsArray()) {

src/core/Config.h

@@ -141,7 +141,7 @@ private:
     int m_maxCpuUsage;
     int m_priority;
     // threads config for each algo
-    Threads m_threads[xmrig::Algo::CRYPTONIGHT_MAX];
+    Threads m_threads[xmrig::Algo::ALGO_MAX];
     // perf algo hashrate results
     float m_algo_perf[xmrig::PerfAlgo::PA_MAX];
 };

src/core/cpu/AdvancedCpuInfo.cpp

@@ -4,9 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018      SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
     m_assembly(ASM_NONE),
     m_aes(false),
+    m_avx2(false),
     m_L2_exclusive(false),
     m_brand(),
     m_cores(0),
@@ -83,6 +84,8 @@ xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
             m_assembly = ASM_INTEL;
         }
     }
+
+    m_avx2 = data.flags[CPU_FEATURE_AVX2];
 }
 
 

src/core/cpu/AdvancedCpuInfo.h

@@ -4,8 +4,9 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -41,6 +42,7 @@ protected:
 
     inline Assembly assembly() const override       { return m_assembly; }
     inline bool hasAES() const override             { return m_aes; }
+    inline bool hasAVX2() const override            { return m_avx2; }
     inline bool isSupported() const override        { return true; }
     inline const char *brand() const override       { return m_brand; }
     inline int32_t cores() const override           { return m_cores; }
@@ -59,6 +61,7 @@ protected:
 private:
     Assembly m_assembly;
     bool m_aes;
+    bool m_avx2;
     bool m_L2_exclusive;
     char m_brand[64];
     int32_t m_cores;

src/crypto/CryptoNight.h

@@ -29,10 +29,23 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#if defined _MSC_VER || defined XMRIG_ARM
+#define ABI_ATTRIBUTE
+#else
+#define ABI_ATTRIBUTE __attribute__((ms_abi))
+#endif
+
+struct cryptonight_ctx;
+typedef void(*cn_mainloop_fun_ms_abi)(cryptonight_ctx*) ABI_ATTRIBUTE;
+typedef void(*cn_mainloop_double_fun_ms_abi)(cryptonight_ctx*, cryptonight_ctx*) ABI_ATTRIBUTE;
 
 struct cryptonight_ctx {
     alignas(16) uint8_t state[224];
     alignas(16) uint8_t *memory;
+    cn_mainloop_fun_ms_abi generated_code;
+    cn_mainloop_double_fun_ms_abi generated_code_double;
+    uint64_t generated_code_height;
+    uint64_t generated_code_double_height;
 };
 
 

src/crypto/CryptoNight_arm.h

@@ -5,9 +5,9 @@
  * Copyright 2014-2016 Wolf9466     <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee    <jayddee246@gmail.com>
  * Copyright 2016      Imran Yusuff <https://github.com/imranyusuff>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
  * Copyright 2018      Lee Clagett <https://github.com/vtnerd>
- * Copyright 2018      SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
  * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
@@ -284,6 +284,34 @@ static inline void cn_explode_scratchpad(const __m128i *input, __m128i *output)
 }
 
 
+#ifndef XMRIG_NO_CN_GPU
+template<xmrig::Algo ALGO, size_t MEM>
+void cn_explode_scratchpad_gpu(const uint8_t *input, uint8_t *output)
+{
+    constexpr size_t hash_size = 200; // 25x8 bytes
+    alignas(16) uint64_t hash[25];
+
+    for (uint64_t i = 0; i < MEM / 512; i++)
+    {
+        memcpy(hash, input, hash_size);
+        hash[0] ^= i;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 160);
+        output += 160;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 176);
+        output += 176;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 176);
+        output += 176;
+    }
+}
+#endif
+
+
 template<xmrig::Algo ALGO, size_t MEM, bool SOFT_AES>
 static inline void cn_implode_scratchpad(const __m128i *input, __m128i *output)
 {
@@ -427,7 +455,7 @@ static inline void cryptonight_monero_tweak(const uint8_t* l, uint64_t idx, __m1
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -448,6 +476,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
 
     VARIANT1_INIT(0);
     VARIANT2_INIT(0);
+    VARIANT4_RANDOM_MATH_INIT(0);
 
     uint64_t al0 = h0[0] ^ h0[4];
     uint64_t ah0 = h0[1] ^ h0[5];
@@ -486,12 +515,17 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l0[idx0 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(0, cl, cx);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx0, cl, &hi);
+                VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx0, bx1);
-            VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo);
+            } else {
+                VARIANT2_INTEGER_MATH(0, cl, cx);
+            }
         }
-        else {
+
-            lo = __umul128(idx0, cl, &hi);
+        lo = __umul128(idx0, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
+            VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo);
         }
 
         al0 += hi;
@@ -541,8 +575,37 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
 }
 
 
+#ifndef XMRIG_NO_CN_GPU
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_arm(const uint8_t *spad, uint8_t *lpad);
+
+
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_single_hash_gpu(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
+{
+    constexpr size_t MASK         = xmrig::CRYPTONIGHT_GPU_MASK;
+    constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
+    constexpr size_t MEM          = xmrig::cn_select_memory<ALGO>();
+
+    static_assert(MASK > 0 && ITERATIONS > 0 && MEM > 0, "unsupported algorithm/variant");
+
+    xmrig::keccak(input, size, ctx[0]->state);
+    cn_explode_scratchpad_gpu<ALGO, MEM>(ctx[0]->state, ctx[0]->memory);
+
+    fesetround(FE_TONEAREST);
+
+    cn_gpu_inner_arm<ITERATIONS, MASK>(ctx[0]->state, ctx[0]->memory);
+
+    cn_implode_scratchpad<xmrig::CRYPTONIGHT_HEAVY, MEM, SOFT_AES>((__m128i*) ctx[0]->memory, (__m128i*) ctx[0]->state);
+
+    xmrig::keccakf((uint64_t*) ctx[0]->state, 24);
+    memcpy(output, ctx[0]->state, 32);
+}
+#endif
+
+
+template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
+inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -566,6 +629,8 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
     VARIANT1_INIT(1);
     VARIANT2_INIT(0);
     VARIANT2_INIT(1);
+    VARIANT4_RANDOM_MATH_INIT(0);
+    VARIANT4_RANDOM_MATH_INIT(1);
 
     cn_explode_scratchpad<ALGO, MEM, SOFT_AES>((__m128i*) h0, (__m128i*) l0);
     cn_explode_scratchpad<ALGO, MEM, SOFT_AES>((__m128i*) h1, (__m128i*) l1);
@@ -621,11 +686,17 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l0[idx0 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(0, cl, cx0);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx0, cl, &hi);
+                VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx00, bx01);
+            } else {
+                VARIANT2_INTEGER_MATH(0, cl, cx0);
+            }
+        }
+
+        lo = __umul128(idx0, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
             VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo);
-        } else {
-            lo = __umul128(idx0, cl, &hi);
         }
 
         al0 += hi;
@@ -645,7 +716,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
         ah0 ^= ch;
         idx0 = al0;
 
-        if (ALGO == xmrig::CRYPTONIGHT_HEAVY) {           
+        if (ALGO == xmrig::CRYPTONIGHT_HEAVY) {
             const int64x2_t x = vld1q_s64(reinterpret_cast<const int64_t *>(&l0[idx0 & MASK]));
             const int64_t n   = vgetq_lane_s64(x, 0);
             const int32_t d   = vgetq_lane_s32(x, 2);
@@ -665,11 +736,17 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l1[idx1 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(1, cl, cx1);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx1, cl, &hi);
+                VARIANT4_RANDOM_MATH(1, al1, ah1, cl, bx10, bx11);
+            } else {
+                VARIANT2_INTEGER_MATH(1, cl, cx1);
+            }
+        }
+
+        lo = __umul128(idx1, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
             VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo);
-        } else {
-            lo = __umul128(idx1, cl, &hi);
         }
 
         al1 += hi;
@@ -704,7 +781,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
                 idx1 = d ^ q;
             }
         }
-        if (VARIANT == xmrig::VARIANT_2) {
+        if (BASE == xmrig::VARIANT_2) {
             bx01 = bx00;
             bx11 = bx10;
         }
@@ -724,19 +801,19 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
 }
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
 }
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, struct cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
 }
 

src/crypto/CryptoNight_constants.h

@@ -4,7 +4,7 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
  * Copyright 2018      Lee Clagett <https://github.com/vtnerd>
  * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
  * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
@@ -27,6 +27,7 @@
 #define XMRIG_CRYPTONIGHT_CONSTANTS_H
 
 
+#include <stddef.h>
 #include <stdint.h>
 
 
@@ -42,6 +43,9 @@ constexpr const uint32_t CRYPTONIGHT_ITER         = 0x80000;
 constexpr const uint32_t CRYPTONIGHT_HALF_ITER    = 0x40000;
 constexpr const uint32_t CRYPTONIGHT_XAO_ITER     = 0x100000;
 
+constexpr const uint32_t CRYPTONIGHT_GPU_ITER     = 0xC000;
+constexpr const uint32_t CRYPTONIGHT_GPU_MASK     = 0x1FFFC0;
+
 constexpr const size_t   CRYPTONIGHT_LITE_MEMORY  = 1 * 1024 * 1024;
 constexpr const uint32_t CRYPTONIGHT_LITE_MASK    = 0xFFFF0;
 constexpr const uint32_t CRYPTONIGHT_LITE_ITER    = 0x40000;
@@ -122,11 +126,13 @@ template<Algo ALGO, Variant variant> inline constexpr uint32_t cn_select_iter()
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_0>()          { return CRYPTONIGHT_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_1>()          { return CRYPTONIGHT_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_2>()          { return CRYPTONIGHT_ITER; }
+template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_WOW>()        { return CRYPTONIGHT_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_XTL>()        { return CRYPTONIGHT_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_HALF>()       { return CRYPTONIGHT_HALF_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_MSR>()        { return CRYPTONIGHT_HALF_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_XAO>()        { return CRYPTONIGHT_XAO_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_RTO>()        { return CRYPTONIGHT_ITER; }
+template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT, VARIANT_GPU>()        { return CRYPTONIGHT_GPU_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT_LITE, VARIANT_0>()     { return CRYPTONIGHT_LITE_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT_LITE, VARIANT_1>()     { return CRYPTONIGHT_LITE_ITER; }
 template<> inline constexpr uint32_t cn_select_iter<CRYPTONIGHT_HEAVY, VARIANT_0>()    { return CRYPTONIGHT_HEAVY_ITER; }
@@ -142,6 +148,9 @@ inline uint32_t cn_select_iter(Algo algorithm, Variant variant)
     case VARIANT_HALF:
         return CRYPTONIGHT_HALF_ITER;
 
+    case VARIANT_GPU:
+        return CRYPTONIGHT_GPU_ITER;
+
     case VARIANT_RTO:
         return CRYPTONIGHT_XAO_ITER;
 
@@ -163,6 +172,9 @@ inline uint32_t cn_select_iter(Algo algorithm, Variant variant)
     case CRYPTONIGHT_HEAVY:
         return CRYPTONIGHT_HEAVY_ITER;
 
+    case CRYPTONIGHT_PICO:
+        return CRYPTONIGHT_TRTL_ITER;
+
     default:
         break;
     }
@@ -183,6 +195,8 @@ template<> inline constexpr Variant cn_base_variant<VARIANT_RTO>()   { return VA
 template<> inline constexpr Variant cn_base_variant<VARIANT_2>()     { return VARIANT_2; }
 template<> inline constexpr Variant cn_base_variant<VARIANT_HALF>()  { return VARIANT_2; }
 template<> inline constexpr Variant cn_base_variant<VARIANT_TRTL>()  { return VARIANT_2; }
+template<> inline constexpr Variant cn_base_variant<VARIANT_GPU>()   { return VARIANT_GPU; }
+template<> inline constexpr Variant cn_base_variant<VARIANT_WOW>()   { return VARIANT_2; }
 
 
 } /* namespace xmrig */

src/crypto/CryptoNight_monero.h

@@ -147,4 +147,32 @@
         vst1q_u64((uint64_t*)((base_ptr) + ((offset) ^ 0x30)), vaddq_u64(chunk2, vreinterpretq_u64_u8(_a))); \
     } while (0)
 #endif
+
+#define SWAP32LE(x) x
+#define SWAP64LE(x) x
+#define hash_extra_blake(data, length, hash) blake256_hash((uint8_t*)(hash), (uint8_t*)(data), (length))
+
+#include "variant4_random_math.h"
+
+#define VARIANT4_RANDOM_MATH_INIT(part) \
+  uint32_t r##part[8]; \
+  struct V4_Instruction code##part[256]; \
+  if (VARIANT == xmrig::VARIANT_WOW) { \
+    r##part[0] = (uint32_t)(h##part[12]); \
+    r##part[1] = (uint32_t)(h##part[12] >> 32); \
+    r##part[2] = (uint32_t)(h##part[13]); \
+    r##part[3] = (uint32_t)(h##part[13] >> 32); \
+  } \
+  v4_random_math_init(code##part, height);
+
+#define VARIANT4_RANDOM_MATH(part, al, ah, cl, bx0, bx1) \
+  if (VARIANT == xmrig::VARIANT_WOW) { \
+    cl ^= (r##part[0] + r##part[1]) | ((uint64_t)(r##part[2] + r##part[3]) << 32); \
+    r##part[4] = static_cast<uint32_t>(al); \
+    r##part[5] = static_cast<uint32_t>(ah); \
+    r##part[6] = static_cast<uint32_t>(_mm_cvtsi128_si32(bx0)); \
+    r##part[7] = static_cast<uint32_t>(_mm_cvtsi128_si32(bx1)); \
+    v4_random_math(code##part, r##part); \
+  }
+
 #endif /* XMRIG_CRYPTONIGHT_MONERO_H */

src/crypto/CryptoNight_test.h

@@ -27,6 +27,9 @@
 #define XMRIG_CRYPTONIGHT_TEST_H
 
 
+#include <stdint.h>
+
+
 const static uint8_t test_input[380] = {
     0x03, 0x05, 0xA0, 0xDB, 0xD6, 0xBF, 0x05, 0xCF, 0x16, 0xE5, 0x03, 0xF3, 0xA6, 0x6F, 0x78, 0x00,
     0x7C, 0xBF, 0x34, 0x14, 0x43, 0x32, 0xEC, 0xBF, 0xC2, 0x2E, 0xD9, 0x5C, 0x87, 0x00, 0x38, 0x3B,
@@ -55,6 +58,18 @@ const static uint8_t test_input[380] = {
     0xCF, 0x50, 0x29, 0x6A, 0x07, 0x0B, 0x93, 0x8F, 0x8F, 0xA8, 0x10, 0x04
 };
 
+const static char* test_input_WOW = R"===(
+9d47bf4c41b7e8e727e681715acb47fa1677cdba9ca7bcb05ad8cc8abd5daa66 5468697320697320612074657374205468697320697320612074657374205468697320697320612074657374 1806260
+0d4a495cb844a3ca8ba4edb8e6bcf829ef1c06d9cdea2b62ca46c2a21b8b0a79 4c6f72656d20697073756d20646f6c6f722073697420616d65742c20636f6e73656374657475722061646970697363696e67 1806261
+a1d6d848b5c5915fccd2f64cf216c6b1a02cf7c77bc80d8d4e51b419e88ff0dd 656c69742c2073656420646f20656975736d6f642074656d706f7220696e6369646964756e74207574206c61626f7265 1806262
+af3a8544a0221a148c2ac90484b19861e3afca33fe17021efb8ad6496b567915 657420646f6c6f7265206d61676e6120616c697175612e20557420656e696d206164206d696e696d2076656e69616d2c 1806263
+313399e0963ae8a99dab8af66d343e097dae0c0feb08dbc43ccdafef5515f413 71756973206e6f737472756420657865726369746174696f6e20756c6c616d636f206c61626f726973206e697369 1806264
+6021c6ef90bff9ae94a7506d623d3a7a86c1756d655f50dd558f716d64622a34 757420616c697175697020657820656120636f6d6d6f646f20636f6e7365717561742e20447569732061757465 1806265
+2b13000535f3db5f9b9b84a65c4351f386cd2cdedebb8c3ad2eab086e6a3fee5 697275726520646f6c6f7220696e20726570726568656e646572697420696e20766f6c7570746174652076656c6974 1806266
+fc0e1dad8e895749dc90eb690bc1ba059a1cd772afaaf65a106bf9e5e6b80503 657373652063696c6c756d20646f6c6f726520657520667567696174206e756c6c612070617269617475722e 1806267
+b60b0afe144deff7d903ed2d5545e77ebe66a3c51fee7016eeb8fee9eb630c0f 4578636570746575722073696e74206f6363616563617420637570696461746174206e6f6e2070726f6964656e742c 1806268
+64774b27e7d5fec862fc4c0c13ac6bf09123b6f05bb0e4b75c97f379a2b3a679 73756e7420696e2063756c706120717569206f666669636961206465736572756e74206d6f6c6c697420616e696d20696420657374206c61626f72756d2e 1806269
+)===";
 
 // "cn/0"
 const static uint8_t test_output_v0[160] = {
@@ -76,7 +91,7 @@ const static uint8_t test_output_v1[160] = {
     0xF2, 0x2D, 0x3D, 0x62, 0x03, 0xD2, 0xA0, 0x8B, 0x41, 0xD9, 0x02, 0x72, 0x78, 0xD8, 0xBC, 0xC9,
     0x83, 0xAC, 0xAD, 0xA9, 0xB6, 0x8E, 0x52, 0xE3, 0xC6, 0x89, 0x69, 0x2A, 0x50, 0xE9, 0x21, 0xD9,
     0xC9, 0xFA, 0xE8, 0x42, 0x5D, 0x86, 0x88, 0xDC, 0x23, 0x6B, 0xCD, 0xBC, 0x42, 0xFD, 0xB4, 0x2D,
-    0x37, 0x6C, 0x6E, 0xC1, 0x90, 0x50, 0x1A, 0xA8, 0x4B, 0x04, 0xA4, 0xB4, 0xCF, 0x1E, 0xE1, 0x22,   
+    0x37, 0x6C, 0x6E, 0xC1, 0x90, 0x50, 0x1A, 0xA8, 0x4B, 0x04, 0xA4, 0xB4, 0xCF, 0x1E, 0xE1, 0x22,
     0xE7, 0x8C, 0x5A, 0x6E, 0x38, 0x30, 0x68, 0x4A, 0x73, 0xFC, 0x1B, 0xC6, 0x6D, 0xFC, 0x8D, 0x98,
     0xB4, 0xC2, 0x23, 0x39, 0xAD, 0xE0, 0x9D, 0xF6, 0x6D, 0x8C, 0x6A, 0xAA, 0xF9, 0xB2, 0xE3, 0x4C,
     0xB6, 0x90, 0x6C, 0xE6, 0x15, 0x5E, 0x46, 0x07, 0x9C, 0xB2, 0x6B, 0xAC, 0x3B, 0xAC, 0x1A, 0xDE,
@@ -271,5 +286,24 @@ const static uint8_t test_output_pico_trtl[160] = {
 };
 #endif
 
+unsigned char hf_hex2bin(char c, bool &err);
+char hf_bin2hex(unsigned char c);
+
+#ifndef XMRIG_NO_CN_GPU
+// "cn/gpu"
+const static uint8_t test_output_gpu[160] = {
+    0xE5, 0x5C, 0xB2, 0x3E, 0x51, 0x64, 0x9A, 0x59, 0xB1, 0x27, 0xB9, 0x6B, 0x51, 0x5F, 0x2B, 0xF7,
+    0xBF, 0xEA, 0x19, 0x97, 0x41, 0xA0, 0x21, 0x6C, 0xF8, 0x38, 0xDE, 0xD0, 0x6E, 0xFF, 0x82, 0xDF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+#endif
+
 
 #endif /* XMRIG_CRYPTONIGHT_TEST_H */

src/crypto/CryptoNight_x86.h

@@ -4,7 +4,7 @@
  * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
  * Copyright 2018      Lee Clagett <https://github.com/vtnerd>
  * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
  * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
@@ -35,6 +35,7 @@
 #endif
 
 
+#include "common/cpu/Cpu.h"
 #include "common/crypto/keccak.h"
 #include "crypto/CryptoNight.h"
 #include "crypto/CryptoNight_constants.h"
@@ -289,6 +290,34 @@ static inline void cn_explode_scratchpad(const __m128i *input, __m128i *output)
 }
 
 
+#ifndef XMRIG_NO_CN_GPU
+template<xmrig::Algo ALGO, size_t MEM>
+void cn_explode_scratchpad_gpu(const uint8_t *input, uint8_t *output)
+{
+    constexpr size_t hash_size = 200; // 25x8 bytes
+    alignas(16) uint64_t hash[25];
+
+    for (uint64_t i = 0; i < MEM / 512; i++)
+    {
+        memcpy(hash, input, hash_size);
+        hash[0] ^= i;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 160);
+        output += 160;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 176);
+        output += 176;
+
+        xmrig::keccakf(hash, 24);
+        memcpy(output, hash, 176);
+        output += 176;
+    }
+}
+#endif
+
+
 template<xmrig::Algo ALGO, size_t MEM, bool SOFT_AES>
 static inline void cn_implode_scratchpad(const __m128i *input, __m128i *output)
 {
@@ -451,7 +480,7 @@ static inline void cryptonight_monero_tweak(uint64_t* mem_out, const uint8_t* l,
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -475,6 +504,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
     VARIANT1_INIT(0);
     VARIANT2_INIT(0);
     VARIANT2_SET_ROUNDING_MODE();
+    VARIANT4_RANDOM_MATH_INIT(0);
 
     uint64_t al0 = h0[0] ^ h0[4];
     uint64_t ah0 = h0[1] ^ h0[5];
@@ -496,7 +526,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
         else if (SOFT_AES) {
             cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], ax0);
         }
-        else {  
+        else {
             cx = _mm_aesenc_si128(cx, ax0);
         }
 
@@ -513,12 +543,17 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l0[idx0 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(0, cl, cx);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx0, cl, &hi);
+                VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx0, bx1);
-            VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo);
+            } else {
+                VARIANT2_INTEGER_MATH(0, cl, cx);
+            }
         }
-        else {
+
-            lo = __umul128(idx0, cl, &hi);
+        lo = __umul128(idx0, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
+            VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo);
         }
 
         al0 += hi;
@@ -566,11 +601,52 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
 }
 
 
+#ifndef XMRIG_NO_CN_GPU
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_avx(const uint8_t *spad, uint8_t *lpad);
+
+
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_ssse3(const uint8_t *spad, uint8_t *lpad);
+
+
+template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
+inline void cryptonight_single_hash_gpu(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
+{
+    constexpr size_t MASK         = xmrig::CRYPTONIGHT_GPU_MASK;
+    constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
+    constexpr size_t MEM          = xmrig::cn_select_memory<ALGO>();
+
+    static_assert(MASK > 0 && ITERATIONS > 0 && MEM > 0, "unsupported algorithm/variant");
+
+    xmrig::keccak(input, size, ctx[0]->state);
+    cn_explode_scratchpad_gpu<ALGO, MEM>(ctx[0]->state, ctx[0]->memory);
+
+#   ifdef _MSC_VER
+    _control87(RC_NEAR, MCW_RC);
+#   else
+    fesetround(FE_TONEAREST);
+#   endif
+
+    if (xmrig::Cpu::info()->hasAVX2()) {
+        cn_gpu_inner_avx<ITERATIONS, MASK>(ctx[0]->state, ctx[0]->memory);
+    } else {
+        cn_gpu_inner_ssse3<ITERATIONS, MASK>(ctx[0]->state, ctx[0]->memory);
+    }
+
+    cn_implode_scratchpad<xmrig::CRYPTONIGHT_HEAVY, MEM, SOFT_AES>((__m128i*) ctx[0]->memory, (__m128i*) ctx[0]->state);
+
+    xmrig::keccakf((uint64_t*) ctx[0]->state, 24);
+    memcpy(output, ctx[0]->state, 32);
+}
+#endif
+
+
 #ifndef XMRIG_NO_ASM
 extern "C" void cnv2_mainloop_ivybridge_asm(cryptonight_ctx *ctx);
 extern "C" void cnv2_mainloop_ryzen_asm(cryptonight_ctx *ctx);
 extern "C" void cnv2_mainloop_bulldozer_asm(cryptonight_ctx *ctx);
-extern "C" void cnv2_double_mainloop_sandybridge_asm(cryptonight_ctx *ctx0, cryptonight_ctx *ctx1);
+extern "C" void cnv2_double_mainloop_sandybridge_asm(cryptonight_ctx* ctx0, cryptonight_ctx* ctx1);
 
 extern xmrig::CpuThread::cn_mainloop_fun        cn_half_mainloop_ivybridge_asm;
 extern xmrig::CpuThread::cn_mainloop_fun        cn_half_mainloop_ryzen_asm;
@@ -582,12 +658,23 @@ extern xmrig::CpuThread::cn_mainloop_fun        cn_trtl_mainloop_ryzen_asm;
 extern xmrig::CpuThread::cn_mainloop_fun        cn_trtl_mainloop_bulldozer_asm;
 extern xmrig::CpuThread::cn_mainloop_double_fun cn_trtl_double_mainloop_sandybridge_asm;
 
+void v4_compile_code(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM);
+void v4_64_compile_code(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM);
+void v4_compile_code_double(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM);
+void v4_64_compile_code_double(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM);
 
 template<xmrig::Algo ALGO, xmrig::Variant VARIANT, xmrig::Assembly ASM>
-inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MEM = xmrig::cn_select_memory<ALGO>();
 
+    if ((VARIANT == xmrig::VARIANT_WOW) && (height != ctx[0]->generated_code_height)) {
+        V4_Instruction code[256];
+        const int code_size = v4_random_math_init(code, height);
+        v4_compile_code(code, code_size, reinterpret_cast<void*>(ctx[0]->generated_code), ASM);
+        ctx[0]->generated_code_height = height;
+    }
+
     xmrig::keccak(input, size, ctx[0]->state);
     cn_explode_scratchpad<ALGO, MEM, false>(reinterpret_cast<__m128i*>(ctx[0]->state), reinterpret_cast<__m128i*>(ctx[0]->memory));
 
@@ -624,6 +711,9 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
             cn_trtl_mainloop_bulldozer_asm(ctx[0]);
         }
     }
+    else if (VARIANT == xmrig::VARIANT_WOW) {
+        ctx[0]->generated_code(ctx[0]);
+    }
 
     cn_implode_scratchpad<ALGO, MEM, false>(reinterpret_cast<__m128i*>(ctx[0]->memory), reinterpret_cast<__m128i*>(ctx[0]->state));
     xmrig::keccakf(reinterpret_cast<uint64_t*>(ctx[0]->state), 24);
@@ -632,10 +722,17 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
 
 
 template<xmrig::Algo ALGO, xmrig::Variant VARIANT, xmrig::Assembly ASM>
-inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MEM = xmrig::cn_select_memory<ALGO>();
 
+    if ((VARIANT == xmrig::VARIANT_WOW) && (height != ctx[0]->generated_code_double_height)) {
+        V4_Instruction code[256];
+        const int code_size = v4_random_math_init(code, height);
+        v4_compile_code_double(code, code_size, reinterpret_cast<void*>(ctx[0]->generated_code_double), ASM);
+        ctx[0]->generated_code_double_height = height;
+    }
+
     xmrig::keccak(input,        size, ctx[0]->state);
     xmrig::keccak(input + size, size, ctx[1]->state);
 
@@ -651,6 +748,9 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
     else if (VARIANT == xmrig::VARIANT_TRTL) {
         cn_trtl_double_mainloop_sandybridge_asm(ctx[0], ctx[1]);
     }
+    else if (VARIANT == xmrig::VARIANT_WOW) {
+        ctx[0]->generated_code_double(ctx[0], ctx[1]);
+    }
 
     cn_implode_scratchpad<ALGO, MEM, false>(reinterpret_cast<__m128i*>(ctx[0]->memory), reinterpret_cast<__m128i*>(ctx[0]->state));
     cn_implode_scratchpad<ALGO, MEM, false>(reinterpret_cast<__m128i*>(ctx[1]->memory), reinterpret_cast<__m128i*>(ctx[1]->state));
@@ -665,7 +765,7 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -690,6 +790,8 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
     VARIANT2_INIT(0);
     VARIANT2_INIT(1);
     VARIANT2_SET_ROUNDING_MODE();
+    VARIANT4_RANDOM_MATH_INIT(0);
+    VARIANT4_RANDOM_MATH_INIT(1);
 
     cn_explode_scratchpad<ALGO, MEM, SOFT_AES>((__m128i*) h0, (__m128i*) l0);
     cn_explode_scratchpad<ALGO, MEM, SOFT_AES>((__m128i*) h1, (__m128i*) l1);
@@ -745,11 +847,17 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l0[idx0 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(0, cl, cx0);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx0, cl, &hi);
+                VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx00, bx01);
+            } else {
+                VARIANT2_INTEGER_MATH(0, cl, cx0);
+            }
+        }
+
+        lo = __umul128(idx0, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
             VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo);
-        } else {
-            lo = __umul128(idx0, cl, &hi);
         }
 
         al0 += hi;
@@ -787,11 +895,17 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
         ch = ((uint64_t*) &l1[idx1 & MASK])[1];
 
         if (BASE == xmrig::VARIANT_2) {
-            VARIANT2_INTEGER_MATH(1, cl, cx1);
+            if (VARIANT == xmrig::VARIANT_WOW) {
-            lo = __umul128(idx1, cl, &hi);
+                VARIANT4_RANDOM_MATH(1, al1, ah1, cl, bx10, bx11);
+            } else {
+                VARIANT2_INTEGER_MATH(1, cl, cx1);
+            }
+        }
+
+        lo = __umul128(idx1, cl, &hi);
+
+        if (BASE == xmrig::VARIANT_2) {
             VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo);
-        } else {
-            lo = __umul128(idx1, cl, &hi);
         }
 
         al1 += hi;
@@ -876,11 +990,17 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
 
 #define CN_STEP4(part, a, b0, b1, c, l, mc, ptr, idx)   \
     if (BASE == xmrig::VARIANT_2) {                     \
-        VARIANT2_INTEGER_MATH(part, cl##part, c);       \
+        if (VARIANT == xmrig::VARIANT_WOW) {            \
-        lo = __umul128(idx, cl##part, &hi);             \
+            const uint64_t al = _mm_cvtsi128_si64(a);   \
+            const uint64_t ah = _mm_cvtsi128_si64(_mm_srli_si128(a, 8)); \
+            VARIANT4_RANDOM_MATH(part, al, ah, cl##part, b0, b1); \
+        } else {                                        \
+            VARIANT2_INTEGER_MATH(part, cl##part, c);   \
+        }                                               \
+    }                                                   \
+    lo = __umul128(idx, cl##part, &hi);                 \
+    if (BASE == xmrig::VARIANT_2) {                     \
         VARIANT2_SHUFFLE2(l, idx & MASK, a, b0, b1, hi, lo); \
-    } else {                                            \
-        lo = __umul128(idx, cl##part, &hi);             \
     }                                                   \
     a = _mm_add_epi64(a, _mm_set_epi64x(lo, hi));       \
                                                         \
@@ -930,11 +1050,12 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
     __m128i ax##n = _mm_set_epi64x(h##n[1] ^ h##n[5], h##n[0] ^ h##n[4]);                        \
     __m128i bx##n##0 = _mm_set_epi64x(h##n[3] ^ h##n[7], h##n[2] ^ h##n[6]);                     \
     __m128i bx##n##1 = _mm_set_epi64x(h##n[9] ^ h##n[11], h##n[8] ^ h##n[10]);                   \
-    __m128i cx##n = _mm_setzero_si128();
+    __m128i cx##n = _mm_setzero_si128();                                                         \
+    VARIANT4_RANDOM_MATH_INIT(n);
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -998,7 +1119,7 @@ inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t si
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();
@@ -1071,7 +1192,7 @@ inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size
 
 
 template<xmrig::Algo ALGO, bool SOFT_AES, xmrig::Variant VARIANT>
-inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx)
+inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
 {
     constexpr size_t MASK         = xmrig::cn_select_mask<ALGO>();
     constexpr size_t ITERATIONS   = xmrig::cn_select_iter<ALGO, VARIANT>();

src/crypto/CryptonightR_gen.cpp

@@ -0,0 +1,132 @@
+/* XMRig
+ * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
+ * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
+ * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
+ * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
+ * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
+ * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2018      Lee Clagett <https://github.com/vtnerd>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ *
+ *   This program is free software: you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, either version 3 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <cstring>
+#include "crypto/CryptoNight_monero.h"
+
+typedef void(*void_func)();
+
+#include "crypto/asm/CryptonightR_template.h"
+#include "Mem.h"
+
+#if !defined XMRIG_ARM && !defined XMRIG_NO_ASM
+
+static inline void add_code(uint8_t* &p, void (*p1)(), void (*p2)())
+{
+    const ptrdiff_t size = reinterpret_cast<const uint8_t*>(p2) - reinterpret_cast<const uint8_t*>(p1);
+    if (size > 0) {
+        memcpy(p, reinterpret_cast<void*>(p1), size);
+        p += size;
+    }
+}
+
+static inline void add_random_math(uint8_t* &p, const V4_Instruction* code, int code_size, const void_func* instructions, const void_func* instructions_mov, bool is_64_bit, xmrig::Assembly ASM)
+{
+    uint32_t prev_rot_src = (uint32_t)(-1);
+
+    for (int i = 0;; ++i) {
+        const V4_Instruction inst = code[i];
+        if (inst.opcode == RET) {
+            break;
+        }
+
+        uint8_t opcode = (inst.opcode == MUL) ? inst.opcode : (inst.opcode + 2);
+        uint8_t dst_index = inst.dst_index;
+        uint8_t src_index = inst.src_index;
+
+        const uint32_t a = inst.dst_index;
+        const uint32_t b = inst.src_index;
+        const uint8_t c = opcode | (dst_index << V4_OPCODE_BITS) | (src_index << (V4_OPCODE_BITS + V4_DST_INDEX_BITS));
+
+        switch (inst.opcode) {
+        case ROR:
+        case ROL:
+            if (b != prev_rot_src) {
+                prev_rot_src = b;
+                add_code(p, instructions_mov[c], instructions_mov[c + 1]);
+            }
+            break;
+        }
+
+        if (a == prev_rot_src) {
+            prev_rot_src = (uint32_t)(-1);
+        }
+
+        void_func begin = instructions[c];
+
+        if ((ASM = xmrig::ASM_BULLDOZER) && (inst.opcode == MUL) && !is_64_bit) {
+            // AMD Bulldozer has latency 4 for 32-bit IMUL and 6 for 64-bit IMUL
+            // Always use 32-bit IMUL for AMD Bulldozer in 32-bit mode - skip prefix 0x48 and change 0x49 to 0x41
+            uint8_t* prefix = reinterpret_cast<uint8_t*>(begin);
+
+            if (*prefix == 0x49) {
+                *(p++) = 0x41;
+            }
+
+            begin = reinterpret_cast<void_func>(prefix + 1);
+        }
+
+        add_code(p, begin, instructions[c + 1]);
+
+        if (inst.opcode == ADD) {
+            *(uint32_t*)(p - sizeof(uint32_t) - (is_64_bit ? 3 : 0)) = inst.C;
+            if (is_64_bit) {
+                prev_rot_src = (uint32_t)(-1);
+            }
+        }
+    }
+}
+
+void v4_compile_code(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM)
+{
+    uint8_t* p0 = reinterpret_cast<uint8_t*>(machine_code);
+    uint8_t* p = p0;
+
+    add_code(p, CryptonightR_template_part1, CryptonightR_template_part2);
+    add_random_math(p, code, code_size, instructions, instructions_mov, false, ASM);
+    add_code(p, CryptonightR_template_part2, CryptonightR_template_part3);
+    *(int*)(p - 4) = static_cast<int>((((const uint8_t*)CryptonightR_template_mainloop) - ((const uint8_t*)CryptonightR_template_part1)) - (p - p0));
+    add_code(p, CryptonightR_template_part3, CryptonightR_template_end);
+
+    Mem::flushInstructionCache(machine_code, p - p0);
+}
+
+void v4_compile_code_double(const V4_Instruction* code, int code_size, void* machine_code, xmrig::Assembly ASM)
+{
+    uint8_t* p0 = reinterpret_cast<uint8_t*>(machine_code);
+    uint8_t* p = p0;
+
+    add_code(p, CryptonightR_template_double_part1, CryptonightR_template_double_part2);
+    add_random_math(p, code, code_size, instructions, instructions_mov, false, ASM);
+    add_code(p, CryptonightR_template_double_part2, CryptonightR_template_double_part3);
+    add_random_math(p, code, code_size, instructions, instructions_mov, false, ASM);
+    add_code(p, CryptonightR_template_double_part3, CryptonightR_template_double_part4);
+    *(int*)(p - 4) = static_cast<int>((((const uint8_t*)CryptonightR_template_double_mainloop) - ((const uint8_t*)CryptonightR_template_double_part1)) - (p - p0));
+    add_code(p, CryptonightR_template_double_part4, CryptonightR_template_double_end);
+
+    Mem::flushInstructionCache(machine_code, p - p0);
+}
+
+#endif

src/crypto/asm/CryptonightR_template.inc

@@ -0,0 +1,478 @@
+PUBLIC FN_PREFIX(CryptonightR_template_part1)
+PUBLIC FN_PREFIX(CryptonightR_template_mainloop)
+PUBLIC FN_PREFIX(CryptonightR_template_part2)
+PUBLIC FN_PREFIX(CryptonightR_template_part3)
+PUBLIC FN_PREFIX(CryptonightR_template_end)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part1)
+PUBLIC FN_PREFIX(CryptonightR_template_double_mainloop)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part2)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part3)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part4)
+PUBLIC FN_PREFIX(CryptonightR_template_double_end)
+
+FN_PREFIX(CryptonightR_template_part1):
+	mov	QWORD PTR [rsp+16], rbx
+	mov	QWORD PTR [rsp+24], rbp
+	mov	QWORD PTR [rsp+32], rsi
+	push	r10
+	push	r11
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	push	rdi
+	sub	rsp, 64
+	mov	r12, rcx
+	mov	r8, QWORD PTR [r12+32]
+	mov	rdx, r12
+	xor	r8, QWORD PTR [r12]
+	mov	r15, QWORD PTR [r12+40]
+	mov	r9, r8
+	xor	r15, QWORD PTR [r12+8]
+	mov	r11, QWORD PTR [r12+224]
+	mov	r12, QWORD PTR [r12+56]
+	xor	r12, QWORD PTR [rdx+24]
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	movaps	XMMWORD PTR [rsp+48], xmm6
+	movq	xmm0, r12
+	movaps	XMMWORD PTR [rsp+32], xmm7
+	movaps	XMMWORD PTR [rsp+16], xmm8
+	movaps	XMMWORD PTR [rsp], xmm9
+	mov	r12, QWORD PTR [rdx+88]
+	xor	r12, QWORD PTR [rdx+72]
+	movq	xmm6, rax
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm6, xmm0
+	and	r9d, 2097136
+	movq	xmm0, r12
+	movq	xmm7, rax
+	punpcklqdq xmm7, xmm0
+	mov r10d, r9d
+	movq	xmm9, rsp
+	mov rsp, r8
+	mov	r8d, 524288
+
+	mov	ebx, [rdx+96]
+	mov	esi, [rdx+100]
+	mov	edi, [rdx+104]
+	mov	ebp, [rdx+108]
+
+	ALIGN(64)
+FN_PREFIX(CryptonightR_template_mainloop):
+	movdqa	xmm5, XMMWORD PTR [r9+r11]
+	movq	xmm0, r15
+	movq	xmm4, rsp
+	punpcklqdq xmm4, xmm0
+	lea	rdx, QWORD PTR [r9+r11]
+
+	aesenc	xmm5, xmm4
+	movd	r10d, xmm5
+	and	r10d, 2097136
+
+	mov	r12d, r9d
+	mov	eax, r9d
+	xor	r9d, 48
+	xor	r12d, 16
+	xor	eax, 32
+	movdqu	xmm0, XMMWORD PTR [r9+r11]
+	movdqu	xmm2, XMMWORD PTR [r12+r11]
+	movdqu	xmm1, XMMWORD PTR [rax+r11]
+	paddq	xmm0, xmm7
+	paddq	xmm2, xmm6
+	paddq	xmm1, xmm4
+	movdqu	XMMWORD PTR [r12+r11], xmm0
+	movq	r12, xmm5
+	movdqu	XMMWORD PTR [rax+r11], xmm2
+	movdqu	XMMWORD PTR [r9+r11], xmm1
+
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm6
+	movdqu	XMMWORD PTR [rdx], xmm0
+
+	lea	r13d, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	r13, rdx
+
+	xor	r13, QWORD PTR [r10+r11]
+	mov	r14, QWORD PTR [r10+r11+8]
+
+	movd eax, xmm6
+	movd edx, xmm7
+
+FN_PREFIX(CryptonightR_template_part2):
+	mov	rax, r13
+	mul	r12
+	movq	xmm0, rax
+	movq	xmm3, rdx
+	punpcklqdq xmm3, xmm0
+
+	mov	r9d, r10d
+	mov	r12d, r10d
+	xor	r9d, 16
+	xor	r12d, 32
+	xor	r10d, 48
+	movdqa	xmm1, XMMWORD PTR [r12+r11]
+	xor	rdx, QWORD PTR [r12+r11]
+	xor	rax, QWORD PTR [r11+r12+8]
+	movdqa	xmm2, XMMWORD PTR [r9+r11]
+	pxor	xmm3, xmm2
+	paddq	xmm7, XMMWORD PTR [r10+r11]
+	paddq	xmm1, xmm4
+	paddq	xmm3, xmm6
+	movdqu	XMMWORD PTR [r9+r11], xmm7
+	movdqu	XMMWORD PTR [r12+r11], xmm3
+	movdqu	XMMWORD PTR [r10+r11], xmm1
+
+	movdqa	xmm7, xmm6
+	add	r15, rax
+	add	rsp, rdx
+	xor	r10, 48
+	mov	QWORD PTR [r10+r11], rsp
+	xor	rsp, r13
+	mov	r9d, esp
+	mov	QWORD PTR [r10+r11+8], r15
+	and	r9d, 2097136
+	xor	r15, r14
+	movdqa	xmm6, xmm5
+	dec	r8d
+	jnz	FN_PREFIX(CryptonightR_template_mainloop)
+
+FN_PREFIX(CryptonightR_template_part3):
+	movq	rsp, xmm9
+
+	mov	rbx, QWORD PTR [rsp+136]
+	mov	rbp, QWORD PTR [rsp+144]
+	mov	rsi, QWORD PTR [rsp+152]
+	movaps	xmm6, XMMWORD PTR [rsp+48]
+	movaps	xmm7, XMMWORD PTR [rsp+32]
+	movaps	xmm8, XMMWORD PTR [rsp+16]
+	movaps	xmm9, XMMWORD PTR [rsp]
+	add	rsp, 64
+	pop	rdi
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	r11
+	pop	r10
+	ret	0
+FN_PREFIX(CryptonightR_template_end):
+
+ALIGN(64)
+FN_PREFIX(CryptonightR_template_double_part1):
+	mov	QWORD PTR [rsp+24], rbx
+	push	rbp
+	push	rsi
+	push	rdi
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	sub	rsp, 320
+	mov	r14, QWORD PTR [rcx+32]
+	mov	r8, rcx
+	xor	r14, QWORD PTR [rcx]
+	mov	r12, QWORD PTR [rcx+40]
+	mov	ebx, r14d
+	mov	rsi, QWORD PTR [rcx+224]
+	and	ebx, 2097136
+	xor	r12, QWORD PTR [rcx+8]
+	mov	rcx, QWORD PTR [rcx+56]
+	xor	rcx, QWORD PTR [r8+24]
+	mov	rax, QWORD PTR [r8+48]
+	xor	rax, QWORD PTR [r8+16]
+	mov	r15, QWORD PTR [rdx+32]
+	xor	r15, QWORD PTR [rdx]
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [r8+88]
+	xor	rcx, QWORD PTR [r8+72]
+	mov	r13, QWORD PTR [rdx+40]
+	mov	rdi, QWORD PTR [rdx+224]
+	xor	r13, QWORD PTR [rdx+8]
+	movaps	XMMWORD PTR [rsp+160], xmm6
+	movaps	XMMWORD PTR [rsp+176], xmm7
+	movaps	XMMWORD PTR [rsp+192], xmm8
+	movaps	XMMWORD PTR [rsp+208], xmm9
+	movaps	XMMWORD PTR [rsp+224], xmm10
+	movaps	XMMWORD PTR [rsp+240], xmm11
+	movaps	XMMWORD PTR [rsp+256], xmm12
+	movaps	XMMWORD PTR [rsp+272], xmm13
+	movaps	XMMWORD PTR [rsp+288], xmm14
+	movaps	XMMWORD PTR [rsp+304], xmm15
+	movq	xmm7, rax
+	mov	rax, QWORD PTR [r8+80]
+	xor	rax, QWORD PTR [r8+64]
+
+	movaps xmm1, XMMWORD PTR [rdx+96]
+	movaps xmm2, XMMWORD PTR [r8+96]
+	movaps XMMWORD PTR [rsp], xmm1
+	movaps XMMWORD PTR [rsp+16], xmm2
+
+	mov	r8d, r15d
+	punpcklqdq xmm7, xmm0
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+56]
+	xor	rcx, QWORD PTR [rdx+24]
+	movq	xmm9, rax
+	mov	QWORD PTR [rsp+128], rsi
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	punpcklqdq xmm9, xmm0
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+88]
+	xor	rcx, QWORD PTR [rdx+72]
+	movq	xmm8, rax
+	mov	QWORD PTR [rsp+136], rdi
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm8, xmm0
+	and	r8d, 2097136
+	movq	xmm0, rcx
+	mov	r11d, 524288
+	movq	xmm10, rax
+	punpcklqdq xmm10, xmm0
+	
+	movq xmm14, QWORD PTR [rsp+128]
+	movq xmm15, QWORD PTR [rsp+136]
+
+	ALIGN(64)
+FN_PREFIX(CryptonightR_template_double_mainloop):
+	movdqu	xmm6, XMMWORD PTR [rbx+rsi]
+	movq	xmm0, r12
+	mov	ecx, ebx
+	movq	xmm3, r14
+	punpcklqdq xmm3, xmm0
+	xor	ebx, 16
+	aesenc	xmm6, xmm3
+	movq	rdx, xmm6
+	movq	xmm4, r15
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	xor	ebx, 48
+	paddq	xmm0, xmm7
+	movdqu	xmm1, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm0
+	paddq	xmm1, xmm3
+	xor	ebx, 16
+	mov	eax, ebx
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm1
+	paddq	xmm0, xmm9
+	movdqu	XMMWORD PTR [rax+rsi], xmm0
+	movdqa	xmm0, xmm6
+	pxor	xmm0, xmm7
+	movdqu	XMMWORD PTR [rcx+rsi], xmm0
+	mov	esi, edx
+	movdqu	xmm5, XMMWORD PTR [r8+rdi]
+	and	esi, 2097136
+	mov	ecx, r8d
+	movq	xmm0, r13
+	punpcklqdq xmm4, xmm0
+	xor	r8d, 16
+	aesenc	xmm5, xmm4
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	xor	r8d, 48
+	paddq	xmm0, xmm8
+	movdqu	xmm1, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm0
+	paddq	xmm1, xmm4
+	xor	r8d, 16
+	mov	eax, r8d
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm1
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rdi], xmm0
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm8
+	movdqu	XMMWORD PTR [rcx+rdi], xmm0
+	movq	rdi, xmm5
+	movq	rcx, xmm14
+	mov	ebp, edi
+	mov	r8, QWORD PTR [rcx+rsi]
+	mov	r10, QWORD PTR [rcx+rsi+8]
+	lea	r9, QWORD PTR [rcx+rsi]
+	xor	esi, 16
+
+	movq xmm0, rsp
+	movq xmm1, rsi
+	movq xmm2, rdi
+	movq xmm11, rbp
+	movq xmm12, r15
+	movq xmm13, rdx
+	mov [rsp+112], rcx
+
+	mov ebx, DWORD PTR [rsp+16]
+	mov esi, DWORD PTR [rsp+20]
+	mov edi, DWORD PTR [rsp+24]
+	mov ebp, DWORD PTR [rsp+28]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+	xor r8, rax
+
+	movd esp, xmm3
+	pextrd r15d, xmm3, 2
+	movd eax, xmm7
+	movd edx, xmm9
+
+FN_PREFIX(CryptonightR_template_double_part2):
+
+	movq rsp, xmm0
+	mov DWORD PTR [rsp+16], ebx
+	mov DWORD PTR [rsp+20], esi
+	mov DWORD PTR [rsp+24], edi
+	mov DWORD PTR [rsp+28], ebp
+
+	movq rsi, xmm1
+	movq rdi, xmm2
+	movq rbp, xmm11
+	movq r15, xmm12
+	movq rdx, xmm13
+	mov rcx, [rsp+112]
+
+	mov rbx, r8
+	mov	rax, r8
+	mul	rdx
+	and	ebp, 2097136
+	mov	r8, rax
+	movq	xmm1, rdx
+	movq	xmm0, r8
+	punpcklqdq xmm1, xmm0
+	pxor	xmm1, XMMWORD PTR [rcx+rsi]
+	xor	esi, 48
+	paddq	xmm1, xmm7
+	movdqu	xmm2, XMMWORD PTR [rsi+rcx]
+	xor	rdx, QWORD PTR [rsi+rcx]
+	paddq	xmm2, xmm3
+	xor	r8, QWORD PTR [rsi+rcx+8]
+	movdqu	XMMWORD PTR [rsi+rcx], xmm1
+	xor	esi, 16
+	mov	eax, esi
+	mov	rsi, rcx
+	movdqu	xmm0, XMMWORD PTR [rax+rcx]
+	movdqu	XMMWORD PTR [rax+rcx], xmm2
+	paddq	xmm0, xmm9
+	add	r12, r8
+	xor	rax, 32
+	add	r14, rdx
+	movdqa	xmm9, xmm7
+	movdqa	xmm7, xmm6
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	mov	QWORD PTR [r9+8], r12
+	xor	r12, r10
+	mov	QWORD PTR [r9], r14
+	movq rcx, xmm15
+	xor	r14, rbx
+	mov	r10d, ebp
+	mov	ebx, r14d
+	xor	ebp, 16
+	and	ebx, 2097136
+	mov	r8, QWORD PTR [r10+rcx]
+	mov	r9, QWORD PTR [r10+rcx+8]
+
+	movq xmm0, rsp
+	movq xmm1, rbx
+	movq xmm2, rsi
+	movq xmm11, rdi
+	movq xmm12, rbp
+	movq xmm13, r15
+	mov [rsp+104], rcx
+
+	mov ebx, DWORD PTR [rsp]
+	mov esi, DWORD PTR [rsp+4]
+	mov edi, DWORD PTR [rsp+8]
+	mov ebp, DWORD PTR [rsp+12]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+
+	xor r8, rax
+	movq xmm3, r8
+
+	movd esp, xmm4
+	pextrd r15d, xmm4, 2
+	movd eax, xmm8
+	movd edx, xmm10
+
+FN_PREFIX(CryptonightR_template_double_part3):
+
+	movq rsp, xmm0
+	mov DWORD PTR [rsp], ebx
+	mov DWORD PTR [rsp+4], esi
+	mov DWORD PTR [rsp+8], edi
+	mov DWORD PTR [rsp+12], ebp
+
+	movq rbx, xmm1
+	movq rsi, xmm2
+	movq rdi, xmm11
+	movq rbp, xmm12
+	movq r15, xmm13
+	mov rcx, [rsp+104]
+
+	mov rax, r8
+	mul	rdi
+	movq	xmm1, rdx
+	movq	xmm0, rax
+	punpcklqdq xmm1, xmm0
+	mov	rdi, rcx
+	mov	r8, rax
+	pxor	xmm1, XMMWORD PTR [rbp+rcx]
+	xor	ebp, 48
+	paddq	xmm1, xmm8
+	xor	r8, QWORD PTR [rbp+rcx+8]
+	xor	rdx, QWORD PTR [rbp+rcx]
+	add	r13, r8
+	movdqu	xmm2, XMMWORD PTR [rbp+rcx]
+	add	r15, rdx
+	movdqu	XMMWORD PTR [rbp+rcx], xmm1
+	paddq	xmm2, xmm4
+	xor	ebp, 16
+	mov	eax, ebp
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbp+rcx]
+	movdqu	XMMWORD PTR [rbp+rcx], xmm2
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	movq rax, xmm3
+	movdqa	xmm10, xmm8
+	mov	QWORD PTR [r10+rcx], r15
+	movdqa	xmm8, xmm5
+	xor	r15, rax
+	mov	QWORD PTR [r10+rcx+8], r13
+	mov	r8d, r15d
+	xor	r13, r9
+	and	r8d, 2097136
+	dec r11d
+	jnz	FN_PREFIX(CryptonightR_template_double_mainloop)
+
+FN_PREFIX(CryptonightR_template_double_part4):
+
+	mov	rbx, QWORD PTR [rsp+400]
+	movaps	xmm6, XMMWORD PTR [rsp+160]
+	movaps	xmm7, XMMWORD PTR [rsp+176]
+	movaps	xmm8, XMMWORD PTR [rsp+192]
+	movaps	xmm9, XMMWORD PTR [rsp+208]
+	movaps	xmm10, XMMWORD PTR [rsp+224]
+	movaps	xmm11, XMMWORD PTR [rsp+240]
+	movaps	xmm12, XMMWORD PTR [rsp+256]
+	movaps	xmm13, XMMWORD PTR [rsp+272]
+	movaps	xmm14, XMMWORD PTR [rsp+288]
+	movaps	xmm15, XMMWORD PTR [rsp+304]
+	add	rsp, 320
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rdi
+	pop	rsi
+	pop	rbp
+	ret	0
+FN_PREFIX(CryptonightR_template_double_end):

src/crypto/asm/CryptonightR_template_win.inc

@@ -0,0 +1,478 @@
+PUBLIC CryptonightR_template_part1
+PUBLIC CryptonightR_template_mainloop
+PUBLIC CryptonightR_template_part2
+PUBLIC CryptonightR_template_part3
+PUBLIC CryptonightR_template_end
+PUBLIC CryptonightR_template_double_part1
+PUBLIC CryptonightR_template_double_mainloop
+PUBLIC CryptonightR_template_double_part2
+PUBLIC CryptonightR_template_double_part3
+PUBLIC CryptonightR_template_double_part4
+PUBLIC CryptonightR_template_double_end
+
+CryptonightR_template_part1:
+	mov	QWORD PTR [rsp+16], rbx
+	mov	QWORD PTR [rsp+24], rbp
+	mov	QWORD PTR [rsp+32], rsi
+	push	r10
+	push	r11
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	push	rdi
+	sub	rsp, 64
+	mov	r12, rcx
+	mov	r8, QWORD PTR [r12+32]
+	mov	rdx, r12
+	xor	r8, QWORD PTR [r12]
+	mov	r15, QWORD PTR [r12+40]
+	mov	r9, r8
+	xor	r15, QWORD PTR [r12+8]
+	mov	r11, QWORD PTR [r12+224]
+	mov	r12, QWORD PTR [r12+56]
+	xor	r12, QWORD PTR [rdx+24]
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	movaps	XMMWORD PTR [rsp+48], xmm6
+	movq	xmm0, r12
+	movaps	XMMWORD PTR [rsp+32], xmm7
+	movaps	XMMWORD PTR [rsp+16], xmm8
+	movaps	XMMWORD PTR [rsp], xmm9
+	mov	r12, QWORD PTR [rdx+88]
+	xor	r12, QWORD PTR [rdx+72]
+	movq	xmm6, rax
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm6, xmm0
+	and	r9d, 2097136
+	movq	xmm0, r12
+	movq	xmm7, rax
+	punpcklqdq xmm7, xmm0
+	mov r10d, r9d
+	movq	xmm9, rsp
+	mov rsp, r8
+	mov	r8d, 524288
+
+	mov	ebx, [rdx+96]
+	mov	esi, [rdx+100]
+	mov	edi, [rdx+104]
+	mov	ebp, [rdx+108]
+
+	ALIGN(64)
+CryptonightR_template_mainloop:
+	movdqa	xmm5, XMMWORD PTR [r9+r11]
+	movq	xmm0, r15
+	movq	xmm4, rsp
+	punpcklqdq xmm4, xmm0
+	lea	rdx, QWORD PTR [r9+r11]
+
+	aesenc	xmm5, xmm4
+	movd	r10d, xmm5
+	and	r10d, 2097136
+
+	mov	r12d, r9d
+	mov	eax, r9d
+	xor	r9d, 48
+	xor	r12d, 16
+	xor	eax, 32
+	movdqu	xmm0, XMMWORD PTR [r9+r11]
+	movdqu	xmm2, XMMWORD PTR [r12+r11]
+	movdqu	xmm1, XMMWORD PTR [rax+r11]
+	paddq	xmm0, xmm7
+	paddq	xmm2, xmm6
+	paddq	xmm1, xmm4
+	movdqu	XMMWORD PTR [r12+r11], xmm0
+	movq	r12, xmm5
+	movdqu	XMMWORD PTR [rax+r11], xmm2
+	movdqu	XMMWORD PTR [r9+r11], xmm1
+
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm6
+	movdqu	XMMWORD PTR [rdx], xmm0
+
+	lea	r13d, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	r13, rdx
+
+	xor	r13, QWORD PTR [r10+r11]
+	mov	r14, QWORD PTR [r10+r11+8]
+
+	movd eax, xmm6
+	movd edx, xmm7
+
+CryptonightR_template_part2:
+	mov	rax, r13
+	mul	r12
+	movq	xmm0, rax
+	movq	xmm3, rdx
+	punpcklqdq xmm3, xmm0
+
+	mov	r9d, r10d
+	mov	r12d, r10d
+	xor	r9d, 16
+	xor	r12d, 32
+	xor	r10d, 48
+	movdqa	xmm1, XMMWORD PTR [r12+r11]
+	xor	rdx, QWORD PTR [r12+r11]
+	xor	rax, QWORD PTR [r11+r12+8]
+	movdqa	xmm2, XMMWORD PTR [r9+r11]
+	pxor	xmm3, xmm2
+	paddq	xmm7, XMMWORD PTR [r10+r11]
+	paddq	xmm1, xmm4
+	paddq	xmm3, xmm6
+	movdqu	XMMWORD PTR [r9+r11], xmm7
+	movdqu	XMMWORD PTR [r12+r11], xmm3
+	movdqu	XMMWORD PTR [r10+r11], xmm1
+
+	movdqa	xmm7, xmm6
+	add	r15, rax
+	add	rsp, rdx
+	xor	r10, 48
+	mov	QWORD PTR [r10+r11], rsp
+	xor	rsp, r13
+	mov	r9d, esp
+	mov	QWORD PTR [r10+r11+8], r15
+	and	r9d, 2097136
+	xor	r15, r14
+	movdqa	xmm6, xmm5
+	dec	r8d
+	jnz	CryptonightR_template_mainloop
+
+CryptonightR_template_part3:
+	movq	rsp, xmm9
+
+	mov	rbx, QWORD PTR [rsp+136]
+	mov	rbp, QWORD PTR [rsp+144]
+	mov	rsi, QWORD PTR [rsp+152]
+	movaps	xmm6, XMMWORD PTR [rsp+48]
+	movaps	xmm7, XMMWORD PTR [rsp+32]
+	movaps	xmm8, XMMWORD PTR [rsp+16]
+	movaps	xmm9, XMMWORD PTR [rsp]
+	add	rsp, 64
+	pop	rdi
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	r11
+	pop	r10
+	ret	0
+CryptonightR_template_end:
+
+ALIGN(64)
+CryptonightR_template_double_part1:
+	mov	QWORD PTR [rsp+24], rbx
+	push	rbp
+	push	rsi
+	push	rdi
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	sub	rsp, 320
+	mov	r14, QWORD PTR [rcx+32]
+	mov	r8, rcx
+	xor	r14, QWORD PTR [rcx]
+	mov	r12, QWORD PTR [rcx+40]
+	mov	ebx, r14d
+	mov	rsi, QWORD PTR [rcx+224]
+	and	ebx, 2097136
+	xor	r12, QWORD PTR [rcx+8]
+	mov	rcx, QWORD PTR [rcx+56]
+	xor	rcx, QWORD PTR [r8+24]
+	mov	rax, QWORD PTR [r8+48]
+	xor	rax, QWORD PTR [r8+16]
+	mov	r15, QWORD PTR [rdx+32]
+	xor	r15, QWORD PTR [rdx]
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [r8+88]
+	xor	rcx, QWORD PTR [r8+72]
+	mov	r13, QWORD PTR [rdx+40]
+	mov	rdi, QWORD PTR [rdx+224]
+	xor	r13, QWORD PTR [rdx+8]
+	movaps	XMMWORD PTR [rsp+160], xmm6
+	movaps	XMMWORD PTR [rsp+176], xmm7
+	movaps	XMMWORD PTR [rsp+192], xmm8
+	movaps	XMMWORD PTR [rsp+208], xmm9
+	movaps	XMMWORD PTR [rsp+224], xmm10
+	movaps	XMMWORD PTR [rsp+240], xmm11
+	movaps	XMMWORD PTR [rsp+256], xmm12
+	movaps	XMMWORD PTR [rsp+272], xmm13
+	movaps	XMMWORD PTR [rsp+288], xmm14
+	movaps	XMMWORD PTR [rsp+304], xmm15
+	movq	xmm7, rax
+	mov	rax, QWORD PTR [r8+80]
+	xor	rax, QWORD PTR [r8+64]
+
+	movaps xmm1, XMMWORD PTR [rdx+96]
+	movaps xmm2, XMMWORD PTR [r8+96]
+	movaps XMMWORD PTR [rsp], xmm1
+	movaps XMMWORD PTR [rsp+16], xmm2
+
+	mov	r8d, r15d
+	punpcklqdq xmm7, xmm0
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+56]
+	xor	rcx, QWORD PTR [rdx+24]
+	movq	xmm9, rax
+	mov	QWORD PTR [rsp+128], rsi
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	punpcklqdq xmm9, xmm0
+	movq	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+88]
+	xor	rcx, QWORD PTR [rdx+72]
+	movq	xmm8, rax
+	mov	QWORD PTR [rsp+136], rdi
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm8, xmm0
+	and	r8d, 2097136
+	movq	xmm0, rcx
+	mov	r11d, 524288
+	movq	xmm10, rax
+	punpcklqdq xmm10, xmm0
+	
+	movq xmm14, QWORD PTR [rsp+128]
+	movq xmm15, QWORD PTR [rsp+136]
+
+	ALIGN(64)
+CryptonightR_template_double_mainloop:
+	movdqu	xmm6, XMMWORD PTR [rbx+rsi]
+	movq	xmm0, r12
+	mov	ecx, ebx
+	movq	xmm3, r14
+	punpcklqdq xmm3, xmm0
+	xor	ebx, 16
+	aesenc	xmm6, xmm3
+	movq	rdx, xmm6
+	movq	xmm4, r15
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	xor	ebx, 48
+	paddq	xmm0, xmm7
+	movdqu	xmm1, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm0
+	paddq	xmm1, xmm3
+	xor	ebx, 16
+	mov	eax, ebx
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm1
+	paddq	xmm0, xmm9
+	movdqu	XMMWORD PTR [rax+rsi], xmm0
+	movdqa	xmm0, xmm6
+	pxor	xmm0, xmm7
+	movdqu	XMMWORD PTR [rcx+rsi], xmm0
+	mov	esi, edx
+	movdqu	xmm5, XMMWORD PTR [r8+rdi]
+	and	esi, 2097136
+	mov	ecx, r8d
+	movq	xmm0, r13
+	punpcklqdq xmm4, xmm0
+	xor	r8d, 16
+	aesenc	xmm5, xmm4
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	xor	r8d, 48
+	paddq	xmm0, xmm8
+	movdqu	xmm1, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm0
+	paddq	xmm1, xmm4
+	xor	r8d, 16
+	mov	eax, r8d
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm1
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rdi], xmm0
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm8
+	movdqu	XMMWORD PTR [rcx+rdi], xmm0
+	movq	rdi, xmm5
+	movq	rcx, xmm14
+	mov	ebp, edi
+	mov	r8, QWORD PTR [rcx+rsi]
+	mov	r10, QWORD PTR [rcx+rsi+8]
+	lea	r9, QWORD PTR [rcx+rsi]
+	xor	esi, 16
+
+	movq xmm0, rsp
+	movq xmm1, rsi
+	movq xmm2, rdi
+	movq xmm11, rbp
+	movq xmm12, r15
+	movq xmm13, rdx
+	mov [rsp+112], rcx
+
+	mov ebx, DWORD PTR [rsp+16]
+	mov esi, DWORD PTR [rsp+20]
+	mov edi, DWORD PTR [rsp+24]
+	mov ebp, DWORD PTR [rsp+28]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+	xor r8, rax
+
+	movd esp, xmm3
+	pextrd r15d, xmm3, 2
+	movd eax, xmm7
+	movd edx, xmm9
+
+CryptonightR_template_double_part2:
+
+	movq rsp, xmm0
+	mov DWORD PTR [rsp+16], ebx
+	mov DWORD PTR [rsp+20], esi
+	mov DWORD PTR [rsp+24], edi
+	mov DWORD PTR [rsp+28], ebp
+
+	movq rsi, xmm1
+	movq rdi, xmm2
+	movq rbp, xmm11
+	movq r15, xmm12
+	movq rdx, xmm13
+	mov rcx, [rsp+112]
+
+	mov rbx, r8
+	mov	rax, r8
+	mul	rdx
+	and	ebp, 2097136
+	mov	r8, rax
+	movq	xmm1, rdx
+	movq	xmm0, r8
+	punpcklqdq xmm1, xmm0
+	pxor	xmm1, XMMWORD PTR [rcx+rsi]
+	xor	esi, 48
+	paddq	xmm1, xmm7
+	movdqu	xmm2, XMMWORD PTR [rsi+rcx]
+	xor	rdx, QWORD PTR [rsi+rcx]
+	paddq	xmm2, xmm3
+	xor	r8, QWORD PTR [rsi+rcx+8]
+	movdqu	XMMWORD PTR [rsi+rcx], xmm1
+	xor	esi, 16
+	mov	eax, esi
+	mov	rsi, rcx
+	movdqu	xmm0, XMMWORD PTR [rax+rcx]
+	movdqu	XMMWORD PTR [rax+rcx], xmm2
+	paddq	xmm0, xmm9
+	add	r12, r8
+	xor	rax, 32
+	add	r14, rdx
+	movdqa	xmm9, xmm7
+	movdqa	xmm7, xmm6
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	mov	QWORD PTR [r9+8], r12
+	xor	r12, r10
+	mov	QWORD PTR [r9], r14
+	movq rcx, xmm15
+	xor	r14, rbx
+	mov	r10d, ebp
+	mov	ebx, r14d
+	xor	ebp, 16
+	and	ebx, 2097136
+	mov	r8, QWORD PTR [r10+rcx]
+	mov	r9, QWORD PTR [r10+rcx+8]
+
+	movq xmm0, rsp
+	movq xmm1, rbx
+	movq xmm2, rsi
+	movq xmm11, rdi
+	movq xmm12, rbp
+	movq xmm13, r15
+	mov [rsp+104], rcx
+
+	mov ebx, DWORD PTR [rsp]
+	mov esi, DWORD PTR [rsp+4]
+	mov edi, DWORD PTR [rsp+8]
+	mov ebp, DWORD PTR [rsp+12]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+
+	xor r8, rax
+	movq xmm3, r8
+
+	movd esp, xmm4
+	pextrd r15d, xmm4, 2
+	movd eax, xmm8
+	movd edx, xmm10
+
+CryptonightR_template_double_part3:
+
+	movq rsp, xmm0
+	mov DWORD PTR [rsp], ebx
+	mov DWORD PTR [rsp+4], esi
+	mov DWORD PTR [rsp+8], edi
+	mov DWORD PTR [rsp+12], ebp
+
+	movq rbx, xmm1
+	movq rsi, xmm2
+	movq rdi, xmm11
+	movq rbp, xmm12
+	movq r15, xmm13
+	mov rcx, [rsp+104]
+
+	mov rax, r8
+	mul	rdi
+	movq	xmm1, rdx
+	movq	xmm0, rax
+	punpcklqdq xmm1, xmm0
+	mov	rdi, rcx
+	mov	r8, rax
+	pxor	xmm1, XMMWORD PTR [rbp+rcx]
+	xor	ebp, 48
+	paddq	xmm1, xmm8
+	xor	r8, QWORD PTR [rbp+rcx+8]
+	xor	rdx, QWORD PTR [rbp+rcx]
+	add	r13, r8
+	movdqu	xmm2, XMMWORD PTR [rbp+rcx]
+	add	r15, rdx
+	movdqu	XMMWORD PTR [rbp+rcx], xmm1
+	paddq	xmm2, xmm4
+	xor	ebp, 16
+	mov	eax, ebp
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbp+rcx]
+	movdqu	XMMWORD PTR [rbp+rcx], xmm2
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	movq rax, xmm3
+	movdqa	xmm10, xmm8
+	mov	QWORD PTR [r10+rcx], r15
+	movdqa	xmm8, xmm5
+	xor	r15, rax
+	mov	QWORD PTR [r10+rcx+8], r13
+	mov	r8d, r15d
+	xor	r13, r9
+	and	r8d, 2097136
+	dec r11d
+	jnz	CryptonightR_template_double_mainloop
+
+CryptonightR_template_double_part4:
+
+	mov	rbx, QWORD PTR [rsp+400]
+	movaps	xmm6, XMMWORD PTR [rsp+160]
+	movaps	xmm7, XMMWORD PTR [rsp+176]
+	movaps	xmm8, XMMWORD PTR [rsp+192]
+	movaps	xmm9, XMMWORD PTR [rsp+208]
+	movaps	xmm10, XMMWORD PTR [rsp+224]
+	movaps	xmm11, XMMWORD PTR [rsp+240]
+	movaps	xmm12, XMMWORD PTR [rsp+256]
+	movaps	xmm13, XMMWORD PTR [rsp+272]
+	movaps	xmm14, XMMWORD PTR [rsp+288]
+	movaps	xmm15, XMMWORD PTR [rsp+304]
+	add	rsp, 320
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rdi
+	pop	rsi
+	pop	rbp
+	ret	0
+CryptonightR_template_double_end:

src/crypto/asm/win64/CryptonightR_template.inc

@@ -0,0 +1,478 @@
+PUBLIC FN_PREFIX(CryptonightR_template_part1)
+PUBLIC FN_PREFIX(CryptonightR_template_mainloop)
+PUBLIC FN_PREFIX(CryptonightR_template_part2)
+PUBLIC FN_PREFIX(CryptonightR_template_part3)
+PUBLIC FN_PREFIX(CryptonightR_template_end)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part1)
+PUBLIC FN_PREFIX(CryptonightR_template_double_mainloop)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part2)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part3)
+PUBLIC FN_PREFIX(CryptonightR_template_double_part4)
+PUBLIC FN_PREFIX(CryptonightR_template_double_end)
+
+FN_PREFIX(CryptonightR_template_part1):
+	mov	QWORD PTR [rsp+16], rbx
+	mov	QWORD PTR [rsp+24], rbp
+	mov	QWORD PTR [rsp+32], rsi
+	push	r10
+	push	r11
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	push	rdi
+	sub	rsp, 64
+	mov	r12, rcx
+	mov	r8, QWORD PTR [r12+32]
+	mov	rdx, r12
+	xor	r8, QWORD PTR [r12]
+	mov	r15, QWORD PTR [r12+40]
+	mov	r9, r8
+	xor	r15, QWORD PTR [r12+8]
+	mov	r11, QWORD PTR [r12+224]
+	mov	r12, QWORD PTR [r12+56]
+	xor	r12, QWORD PTR [rdx+24]
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	movaps	XMMWORD PTR [rsp+48], xmm6
+	movd	xmm0, r12
+	movaps	XMMWORD PTR [rsp+32], xmm7
+	movaps	XMMWORD PTR [rsp+16], xmm8
+	movaps	XMMWORD PTR [rsp], xmm9
+	mov	r12, QWORD PTR [rdx+88]
+	xor	r12, QWORD PTR [rdx+72]
+	movd	xmm6, rax
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm6, xmm0
+	and	r9d, 2097136
+	movd	xmm0, r12
+	movd	xmm7, rax
+	punpcklqdq xmm7, xmm0
+	mov r10d, r9d
+	movd	xmm9, rsp
+	mov rsp, r8
+	mov	r8d, 524288
+
+	mov	ebx, [rdx+96]
+	mov	esi, [rdx+100]
+	mov	edi, [rdx+104]
+	mov	ebp, [rdx+108]
+
+	ALIGN(64)
+FN_PREFIX(CryptonightR_template_mainloop):
+	movdqa	xmm5, XMMWORD PTR [r9+r11]
+	movd	xmm0, r15
+	movd	xmm4, rsp
+	punpcklqdq xmm4, xmm0
+	lea	rdx, QWORD PTR [r9+r11]
+
+	aesenc	xmm5, xmm4
+	movd	r10d, xmm5
+	and	r10d, 2097136
+
+	mov	r12d, r9d
+	mov	eax, r9d
+	xor	r9d, 48
+	xor	r12d, 16
+	xor	eax, 32
+	movdqu	xmm0, XMMWORD PTR [r9+r11]
+	movdqu	xmm2, XMMWORD PTR [r12+r11]
+	movdqu	xmm1, XMMWORD PTR [rax+r11]
+	paddq	xmm0, xmm7
+	paddq	xmm2, xmm6
+	paddq	xmm1, xmm4
+	movdqu	XMMWORD PTR [r12+r11], xmm0
+	movd	r12, xmm5
+	movdqu	XMMWORD PTR [rax+r11], xmm2
+	movdqu	XMMWORD PTR [r9+r11], xmm1
+
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm6
+	movdqu	XMMWORD PTR [rdx], xmm0
+
+	lea	r13d, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	r13, rdx
+
+	xor	r13, QWORD PTR [r10+r11]
+	mov	r14, QWORD PTR [r10+r11+8]
+
+	movd eax, xmm6
+	movd edx, xmm7
+
+FN_PREFIX(CryptonightR_template_part2):
+	mov	rax, r13
+	mul	r12
+	movd	xmm0, rax
+	movd	xmm3, rdx
+	punpcklqdq xmm3, xmm0
+
+	mov	r9d, r10d
+	mov	r12d, r10d
+	xor	r9d, 16
+	xor	r12d, 32
+	xor	r10d, 48
+	movdqa	xmm1, XMMWORD PTR [r12+r11]
+	xor	rdx, QWORD PTR [r12+r11]
+	xor	rax, QWORD PTR [r11+r12+8]
+	movdqa	xmm2, XMMWORD PTR [r9+r11]
+	pxor	xmm3, xmm2
+	paddq	xmm7, XMMWORD PTR [r10+r11]
+	paddq	xmm1, xmm4
+	paddq	xmm3, xmm6
+	movdqu	XMMWORD PTR [r9+r11], xmm7
+	movdqu	XMMWORD PTR [r12+r11], xmm3
+	movdqu	XMMWORD PTR [r10+r11], xmm1
+
+	movdqa	xmm7, xmm6
+	add	r15, rax
+	add	rsp, rdx
+	xor	r10, 48
+	mov	QWORD PTR [r10+r11], rsp
+	xor	rsp, r13
+	mov	r9d, esp
+	mov	QWORD PTR [r10+r11+8], r15
+	and	r9d, 2097136
+	xor	r15, r14
+	movdqa	xmm6, xmm5
+	dec	r8d
+	jnz	FN_PREFIX(CryptonightR_template_mainloop)
+
+FN_PREFIX(CryptonightR_template_part3):
+	movd	rsp, xmm9
+
+	mov	rbx, QWORD PTR [rsp+136]
+	mov	rbp, QWORD PTR [rsp+144]
+	mov	rsi, QWORD PTR [rsp+152]
+	movaps	xmm6, XMMWORD PTR [rsp+48]
+	movaps	xmm7, XMMWORD PTR [rsp+32]
+	movaps	xmm8, XMMWORD PTR [rsp+16]
+	movaps	xmm9, XMMWORD PTR [rsp]
+	add	rsp, 64
+	pop	rdi
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	r11
+	pop	r10
+	ret	0
+FN_PREFIX(CryptonightR_template_end):
+
+ALIGN(64)
+FN_PREFIX(CryptonightR_template_double_part1):
+	mov	QWORD PTR [rsp+24], rbx
+	push	rbp
+	push	rsi
+	push	rdi
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	sub	rsp, 320
+	mov	r14, QWORD PTR [rcx+32]
+	mov	r8, rcx
+	xor	r14, QWORD PTR [rcx]
+	mov	r12, QWORD PTR [rcx+40]
+	mov	ebx, r14d
+	mov	rsi, QWORD PTR [rcx+224]
+	and	ebx, 2097136
+	xor	r12, QWORD PTR [rcx+8]
+	mov	rcx, QWORD PTR [rcx+56]
+	xor	rcx, QWORD PTR [r8+24]
+	mov	rax, QWORD PTR [r8+48]
+	xor	rax, QWORD PTR [r8+16]
+	mov	r15, QWORD PTR [rdx+32]
+	xor	r15, QWORD PTR [rdx]
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [r8+88]
+	xor	rcx, QWORD PTR [r8+72]
+	mov	r13, QWORD PTR [rdx+40]
+	mov	rdi, QWORD PTR [rdx+224]
+	xor	r13, QWORD PTR [rdx+8]
+	movaps	XMMWORD PTR [rsp+160], xmm6
+	movaps	XMMWORD PTR [rsp+176], xmm7
+	movaps	XMMWORD PTR [rsp+192], xmm8
+	movaps	XMMWORD PTR [rsp+208], xmm9
+	movaps	XMMWORD PTR [rsp+224], xmm10
+	movaps	XMMWORD PTR [rsp+240], xmm11
+	movaps	XMMWORD PTR [rsp+256], xmm12
+	movaps	XMMWORD PTR [rsp+272], xmm13
+	movaps	XMMWORD PTR [rsp+288], xmm14
+	movaps	XMMWORD PTR [rsp+304], xmm15
+	movd	xmm7, rax
+	mov	rax, QWORD PTR [r8+80]
+	xor	rax, QWORD PTR [r8+64]
+
+	movaps xmm1, XMMWORD PTR [rdx+96]
+	movaps xmm2, XMMWORD PTR [r8+96]
+	movaps XMMWORD PTR [rsp], xmm1
+	movaps XMMWORD PTR [rsp+16], xmm2
+
+	mov	r8d, r15d
+	punpcklqdq xmm7, xmm0
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+56]
+	xor	rcx, QWORD PTR [rdx+24]
+	movd	xmm9, rax
+	mov	QWORD PTR [rsp+128], rsi
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	punpcklqdq xmm9, xmm0
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+88]
+	xor	rcx, QWORD PTR [rdx+72]
+	movd	xmm8, rax
+	mov	QWORD PTR [rsp+136], rdi
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm8, xmm0
+	and	r8d, 2097136
+	movd	xmm0, rcx
+	mov	r11d, 524288
+	movd	xmm10, rax
+	punpcklqdq xmm10, xmm0
+	
+	movd xmm14, QWORD PTR [rsp+128]
+	movd xmm15, QWORD PTR [rsp+136]
+
+	ALIGN(64)
+FN_PREFIX(CryptonightR_template_double_mainloop):
+	movdqu	xmm6, XMMWORD PTR [rbx+rsi]
+	movd	xmm0, r12
+	mov	ecx, ebx
+	movd	xmm3, r14
+	punpcklqdq xmm3, xmm0
+	xor	ebx, 16
+	aesenc	xmm6, xmm3
+	movd	rdx, xmm6
+	movd	xmm4, r15
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	xor	ebx, 48
+	paddq	xmm0, xmm7
+	movdqu	xmm1, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm0
+	paddq	xmm1, xmm3
+	xor	ebx, 16
+	mov	eax, ebx
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm1
+	paddq	xmm0, xmm9
+	movdqu	XMMWORD PTR [rax+rsi], xmm0
+	movdqa	xmm0, xmm6
+	pxor	xmm0, xmm7
+	movdqu	XMMWORD PTR [rcx+rsi], xmm0
+	mov	esi, edx
+	movdqu	xmm5, XMMWORD PTR [r8+rdi]
+	and	esi, 2097136
+	mov	ecx, r8d
+	movd	xmm0, r13
+	punpcklqdq xmm4, xmm0
+	xor	r8d, 16
+	aesenc	xmm5, xmm4
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	xor	r8d, 48
+	paddq	xmm0, xmm8
+	movdqu	xmm1, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm0
+	paddq	xmm1, xmm4
+	xor	r8d, 16
+	mov	eax, r8d
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm1
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rdi], xmm0
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm8
+	movdqu	XMMWORD PTR [rcx+rdi], xmm0
+	movd	rdi, xmm5
+	movd	rcx, xmm14
+	mov	ebp, edi
+	mov	r8, QWORD PTR [rcx+rsi]
+	mov	r10, QWORD PTR [rcx+rsi+8]
+	lea	r9, QWORD PTR [rcx+rsi]
+	xor	esi, 16
+
+	movd xmm0, rsp
+	movd xmm1, rsi
+	movd xmm2, rdi
+	movd xmm11, rbp
+	movd xmm12, r15
+	movd xmm13, rdx
+	mov [rsp+112], rcx
+
+	mov ebx, DWORD PTR [rsp+16]
+	mov esi, DWORD PTR [rsp+20]
+	mov edi, DWORD PTR [rsp+24]
+	mov ebp, DWORD PTR [rsp+28]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+	xor r8, rax
+
+	movd esp, xmm3
+	pextrd r15d, xmm3, 2
+	movd eax, xmm7
+	movd edx, xmm9
+
+FN_PREFIX(CryptonightR_template_double_part2):
+
+	movd rsp, xmm0
+	mov DWORD PTR [rsp+16], ebx
+	mov DWORD PTR [rsp+20], esi
+	mov DWORD PTR [rsp+24], edi
+	mov DWORD PTR [rsp+28], ebp
+
+	movd rsi, xmm1
+	movd rdi, xmm2
+	movd rbp, xmm11
+	movd r15, xmm12
+	movd rdx, xmm13
+	mov rcx, [rsp+112]
+
+	mov rbx, r8
+	mov	rax, r8
+	mul	rdx
+	and	ebp, 2097136
+	mov	r8, rax
+	movd	xmm1, rdx
+	movd	xmm0, r8
+	punpcklqdq xmm1, xmm0
+	pxor	xmm1, XMMWORD PTR [rcx+rsi]
+	xor	esi, 48
+	paddq	xmm1, xmm7
+	movdqu	xmm2, XMMWORD PTR [rsi+rcx]
+	xor	rdx, QWORD PTR [rsi+rcx]
+	paddq	xmm2, xmm3
+	xor	r8, QWORD PTR [rsi+rcx+8]
+	movdqu	XMMWORD PTR [rsi+rcx], xmm1
+	xor	esi, 16
+	mov	eax, esi
+	mov	rsi, rcx
+	movdqu	xmm0, XMMWORD PTR [rax+rcx]
+	movdqu	XMMWORD PTR [rax+rcx], xmm2
+	paddq	xmm0, xmm9
+	add	r12, r8
+	xor	rax, 32
+	add	r14, rdx
+	movdqa	xmm9, xmm7
+	movdqa	xmm7, xmm6
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	mov	QWORD PTR [r9+8], r12
+	xor	r12, r10
+	mov	QWORD PTR [r9], r14
+	movd rcx, xmm15
+	xor	r14, rbx
+	mov	r10d, ebp
+	mov	ebx, r14d
+	xor	ebp, 16
+	and	ebx, 2097136
+	mov	r8, QWORD PTR [r10+rcx]
+	mov	r9, QWORD PTR [r10+rcx+8]
+
+	movd xmm0, rsp
+	movd xmm1, rbx
+	movd xmm2, rsi
+	movd xmm11, rdi
+	movd xmm12, rbp
+	movd xmm13, r15
+	mov [rsp+104], rcx
+
+	mov ebx, DWORD PTR [rsp]
+	mov esi, DWORD PTR [rsp+4]
+	mov edi, DWORD PTR [rsp+8]
+	mov ebp, DWORD PTR [rsp+12]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+
+	xor r8, rax
+	movd xmm3, r8
+
+	movd esp, xmm4
+	pextrd r15d, xmm4, 2
+	movd eax, xmm8
+	movd edx, xmm10
+
+FN_PREFIX(CryptonightR_template_double_part3):
+
+	movd rsp, xmm0
+	mov DWORD PTR [rsp], ebx
+	mov DWORD PTR [rsp+4], esi
+	mov DWORD PTR [rsp+8], edi
+	mov DWORD PTR [rsp+12], ebp
+
+	movd rbx, xmm1
+	movd rsi, xmm2
+	movd rdi, xmm11
+	movd rbp, xmm12
+	movd r15, xmm13
+	mov rcx, [rsp+104]
+
+	mov rax, r8
+	mul	rdi
+	movd	xmm1, rdx
+	movd	xmm0, rax
+	punpcklqdq xmm1, xmm0
+	mov	rdi, rcx
+	mov	r8, rax
+	pxor	xmm1, XMMWORD PTR [rbp+rcx]
+	xor	ebp, 48
+	paddq	xmm1, xmm8
+	xor	r8, QWORD PTR [rbp+rcx+8]
+	xor	rdx, QWORD PTR [rbp+rcx]
+	add	r13, r8
+	movdqu	xmm2, XMMWORD PTR [rbp+rcx]
+	add	r15, rdx
+	movdqu	XMMWORD PTR [rbp+rcx], xmm1
+	paddq	xmm2, xmm4
+	xor	ebp, 16
+	mov	eax, ebp
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbp+rcx]
+	movdqu	XMMWORD PTR [rbp+rcx], xmm2
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	movd rax, xmm3
+	movdqa	xmm10, xmm8
+	mov	QWORD PTR [r10+rcx], r15
+	movdqa	xmm8, xmm5
+	xor	r15, rax
+	mov	QWORD PTR [r10+rcx+8], r13
+	mov	r8d, r15d
+	xor	r13, r9
+	and	r8d, 2097136
+	dec r11d
+	jnz	FN_PREFIX(CryptonightR_template_double_mainloop)
+
+FN_PREFIX(CryptonightR_template_double_part4):
+
+	mov	rbx, QWORD PTR [rsp+400]
+	movaps	xmm6, XMMWORD PTR [rsp+160]
+	movaps	xmm7, XMMWORD PTR [rsp+176]
+	movaps	xmm8, XMMWORD PTR [rsp+192]
+	movaps	xmm9, XMMWORD PTR [rsp+208]
+	movaps	xmm10, XMMWORD PTR [rsp+224]
+	movaps	xmm11, XMMWORD PTR [rsp+240]
+	movaps	xmm12, XMMWORD PTR [rsp+256]
+	movaps	xmm13, XMMWORD PTR [rsp+272]
+	movaps	xmm14, XMMWORD PTR [rsp+288]
+	movaps	xmm15, XMMWORD PTR [rsp+304]
+	add	rsp, 320
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rdi
+	pop	rsi
+	pop	rbp
+	ret	0
+FN_PREFIX(CryptonightR_template_double_end):

src/crypto/asm/win64/CryptonightR_template_win.inc

@@ -0,0 +1,478 @@
+PUBLIC CryptonightR_template_part1
+PUBLIC CryptonightR_template_mainloop
+PUBLIC CryptonightR_template_part2
+PUBLIC CryptonightR_template_part3
+PUBLIC CryptonightR_template_end
+PUBLIC CryptonightR_template_double_part1
+PUBLIC CryptonightR_template_double_mainloop
+PUBLIC CryptonightR_template_double_part2
+PUBLIC CryptonightR_template_double_part3
+PUBLIC CryptonightR_template_double_part4
+PUBLIC CryptonightR_template_double_end
+
+CryptonightR_template_part1:
+	mov	QWORD PTR [rsp+16], rbx
+	mov	QWORD PTR [rsp+24], rbp
+	mov	QWORD PTR [rsp+32], rsi
+	push	r10
+	push	r11
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	push	rdi
+	sub	rsp, 64
+	mov	r12, rcx
+	mov	r8, QWORD PTR [r12+32]
+	mov	rdx, r12
+	xor	r8, QWORD PTR [r12]
+	mov	r15, QWORD PTR [r12+40]
+	mov	r9, r8
+	xor	r15, QWORD PTR [r12+8]
+	mov	r11, QWORD PTR [r12+224]
+	mov	r12, QWORD PTR [r12+56]
+	xor	r12, QWORD PTR [rdx+24]
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	movaps	XMMWORD PTR [rsp+48], xmm6
+	movd	xmm0, r12
+	movaps	XMMWORD PTR [rsp+32], xmm7
+	movaps	XMMWORD PTR [rsp+16], xmm8
+	movaps	XMMWORD PTR [rsp], xmm9
+	mov	r12, QWORD PTR [rdx+88]
+	xor	r12, QWORD PTR [rdx+72]
+	movd	xmm6, rax
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm6, xmm0
+	and	r9d, 2097136
+	movd	xmm0, r12
+	movd	xmm7, rax
+	punpcklqdq xmm7, xmm0
+	mov r10d, r9d
+	movd	xmm9, rsp
+	mov rsp, r8
+	mov	r8d, 524288
+
+	mov	ebx, [rdx+96]
+	mov	esi, [rdx+100]
+	mov	edi, [rdx+104]
+	mov	ebp, [rdx+108]
+
+	ALIGN(64)
+CryptonightR_template_mainloop:
+	movdqa	xmm5, XMMWORD PTR [r9+r11]
+	movd	xmm0, r15
+	movd	xmm4, rsp
+	punpcklqdq xmm4, xmm0
+	lea	rdx, QWORD PTR [r9+r11]
+
+	aesenc	xmm5, xmm4
+	movd	r10d, xmm5
+	and	r10d, 2097136
+
+	mov	r12d, r9d
+	mov	eax, r9d
+	xor	r9d, 48
+	xor	r12d, 16
+	xor	eax, 32
+	movdqu	xmm0, XMMWORD PTR [r9+r11]
+	movdqu	xmm2, XMMWORD PTR [r12+r11]
+	movdqu	xmm1, XMMWORD PTR [rax+r11]
+	paddq	xmm0, xmm7
+	paddq	xmm2, xmm6
+	paddq	xmm1, xmm4
+	movdqu	XMMWORD PTR [r12+r11], xmm0
+	movd	r12, xmm5
+	movdqu	XMMWORD PTR [rax+r11], xmm2
+	movdqu	XMMWORD PTR [r9+r11], xmm1
+
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm6
+	movdqu	XMMWORD PTR [rdx], xmm0
+
+	lea	r13d, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	r13, rdx
+
+	xor	r13, QWORD PTR [r10+r11]
+	mov	r14, QWORD PTR [r10+r11+8]
+
+	movd eax, xmm6
+	movd edx, xmm7
+
+CryptonightR_template_part2:
+	mov	rax, r13
+	mul	r12
+	movd	xmm0, rax
+	movd	xmm3, rdx
+	punpcklqdq xmm3, xmm0
+
+	mov	r9d, r10d
+	mov	r12d, r10d
+	xor	r9d, 16
+	xor	r12d, 32
+	xor	r10d, 48
+	movdqa	xmm1, XMMWORD PTR [r12+r11]
+	xor	rdx, QWORD PTR [r12+r11]
+	xor	rax, QWORD PTR [r11+r12+8]
+	movdqa	xmm2, XMMWORD PTR [r9+r11]
+	pxor	xmm3, xmm2
+	paddq	xmm7, XMMWORD PTR [r10+r11]
+	paddq	xmm1, xmm4
+	paddq	xmm3, xmm6
+	movdqu	XMMWORD PTR [r9+r11], xmm7
+	movdqu	XMMWORD PTR [r12+r11], xmm3
+	movdqu	XMMWORD PTR [r10+r11], xmm1
+
+	movdqa	xmm7, xmm6
+	add	r15, rax
+	add	rsp, rdx
+	xor	r10, 48
+	mov	QWORD PTR [r10+r11], rsp
+	xor	rsp, r13
+	mov	r9d, esp
+	mov	QWORD PTR [r10+r11+8], r15
+	and	r9d, 2097136
+	xor	r15, r14
+	movdqa	xmm6, xmm5
+	dec	r8d
+	jnz	CryptonightR_template_mainloop
+
+CryptonightR_template_part3:
+	movd	rsp, xmm9
+
+	mov	rbx, QWORD PTR [rsp+136]
+	mov	rbp, QWORD PTR [rsp+144]
+	mov	rsi, QWORD PTR [rsp+152]
+	movaps	xmm6, XMMWORD PTR [rsp+48]
+	movaps	xmm7, XMMWORD PTR [rsp+32]
+	movaps	xmm8, XMMWORD PTR [rsp+16]
+	movaps	xmm9, XMMWORD PTR [rsp]
+	add	rsp, 64
+	pop	rdi
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	r11
+	pop	r10
+	ret	0
+CryptonightR_template_end:
+
+ALIGN(64)
+CryptonightR_template_double_part1:
+	mov	QWORD PTR [rsp+24], rbx
+	push	rbp
+	push	rsi
+	push	rdi
+	push	r12
+	push	r13
+	push	r14
+	push	r15
+	sub	rsp, 320
+	mov	r14, QWORD PTR [rcx+32]
+	mov	r8, rcx
+	xor	r14, QWORD PTR [rcx]
+	mov	r12, QWORD PTR [rcx+40]
+	mov	ebx, r14d
+	mov	rsi, QWORD PTR [rcx+224]
+	and	ebx, 2097136
+	xor	r12, QWORD PTR [rcx+8]
+	mov	rcx, QWORD PTR [rcx+56]
+	xor	rcx, QWORD PTR [r8+24]
+	mov	rax, QWORD PTR [r8+48]
+	xor	rax, QWORD PTR [r8+16]
+	mov	r15, QWORD PTR [rdx+32]
+	xor	r15, QWORD PTR [rdx]
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [r8+88]
+	xor	rcx, QWORD PTR [r8+72]
+	mov	r13, QWORD PTR [rdx+40]
+	mov	rdi, QWORD PTR [rdx+224]
+	xor	r13, QWORD PTR [rdx+8]
+	movaps	XMMWORD PTR [rsp+160], xmm6
+	movaps	XMMWORD PTR [rsp+176], xmm7
+	movaps	XMMWORD PTR [rsp+192], xmm8
+	movaps	XMMWORD PTR [rsp+208], xmm9
+	movaps	XMMWORD PTR [rsp+224], xmm10
+	movaps	XMMWORD PTR [rsp+240], xmm11
+	movaps	XMMWORD PTR [rsp+256], xmm12
+	movaps	XMMWORD PTR [rsp+272], xmm13
+	movaps	XMMWORD PTR [rsp+288], xmm14
+	movaps	XMMWORD PTR [rsp+304], xmm15
+	movd	xmm7, rax
+	mov	rax, QWORD PTR [r8+80]
+	xor	rax, QWORD PTR [r8+64]
+
+	movaps xmm1, XMMWORD PTR [rdx+96]
+	movaps xmm2, XMMWORD PTR [r8+96]
+	movaps XMMWORD PTR [rsp], xmm1
+	movaps XMMWORD PTR [rsp+16], xmm2
+
+	mov	r8d, r15d
+	punpcklqdq xmm7, xmm0
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+56]
+	xor	rcx, QWORD PTR [rdx+24]
+	movd	xmm9, rax
+	mov	QWORD PTR [rsp+128], rsi
+	mov	rax, QWORD PTR [rdx+48]
+	xor	rax, QWORD PTR [rdx+16]
+	punpcklqdq xmm9, xmm0
+	movd	xmm0, rcx
+	mov	rcx, QWORD PTR [rdx+88]
+	xor	rcx, QWORD PTR [rdx+72]
+	movd	xmm8, rax
+	mov	QWORD PTR [rsp+136], rdi
+	mov	rax, QWORD PTR [rdx+80]
+	xor	rax, QWORD PTR [rdx+64]
+	punpcklqdq xmm8, xmm0
+	and	r8d, 2097136
+	movd	xmm0, rcx
+	mov	r11d, 524288
+	movd	xmm10, rax
+	punpcklqdq xmm10, xmm0
+	
+	movd xmm14, QWORD PTR [rsp+128]
+	movd xmm15, QWORD PTR [rsp+136]
+
+	ALIGN(64)
+CryptonightR_template_double_mainloop:
+	movdqu	xmm6, XMMWORD PTR [rbx+rsi]
+	movd	xmm0, r12
+	mov	ecx, ebx
+	movd	xmm3, r14
+	punpcklqdq xmm3, xmm0
+	xor	ebx, 16
+	aesenc	xmm6, xmm3
+	movd	rdx, xmm6
+	movd	xmm4, r15
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	xor	ebx, 48
+	paddq	xmm0, xmm7
+	movdqu	xmm1, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm0
+	paddq	xmm1, xmm3
+	xor	ebx, 16
+	mov	eax, ebx
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbx+rsi]
+	movdqu	XMMWORD PTR [rbx+rsi], xmm1
+	paddq	xmm0, xmm9
+	movdqu	XMMWORD PTR [rax+rsi], xmm0
+	movdqa	xmm0, xmm6
+	pxor	xmm0, xmm7
+	movdqu	XMMWORD PTR [rcx+rsi], xmm0
+	mov	esi, edx
+	movdqu	xmm5, XMMWORD PTR [r8+rdi]
+	and	esi, 2097136
+	mov	ecx, r8d
+	movd	xmm0, r13
+	punpcklqdq xmm4, xmm0
+	xor	r8d, 16
+	aesenc	xmm5, xmm4
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	xor	r8d, 48
+	paddq	xmm0, xmm8
+	movdqu	xmm1, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm0
+	paddq	xmm1, xmm4
+	xor	r8d, 16
+	mov	eax, r8d
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [r8+rdi]
+	movdqu	XMMWORD PTR [r8+rdi], xmm1
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rdi], xmm0
+	movdqa	xmm0, xmm5
+	pxor	xmm0, xmm8
+	movdqu	XMMWORD PTR [rcx+rdi], xmm0
+	movd	rdi, xmm5
+	movd	rcx, xmm14
+	mov	ebp, edi
+	mov	r8, QWORD PTR [rcx+rsi]
+	mov	r10, QWORD PTR [rcx+rsi+8]
+	lea	r9, QWORD PTR [rcx+rsi]
+	xor	esi, 16
+
+	movd xmm0, rsp
+	movd xmm1, rsi
+	movd xmm2, rdi
+	movd xmm11, rbp
+	movd xmm12, r15
+	movd xmm13, rdx
+	mov [rsp+112], rcx
+
+	mov ebx, DWORD PTR [rsp+16]
+	mov esi, DWORD PTR [rsp+20]
+	mov edi, DWORD PTR [rsp+24]
+	mov ebp, DWORD PTR [rsp+28]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+	xor r8, rax
+
+	movd esp, xmm3
+	pextrd r15d, xmm3, 2
+	movd eax, xmm7
+	movd edx, xmm9
+
+CryptonightR_template_double_part2:
+
+	movd rsp, xmm0
+	mov DWORD PTR [rsp+16], ebx
+	mov DWORD PTR [rsp+20], esi
+	mov DWORD PTR [rsp+24], edi
+	mov DWORD PTR [rsp+28], ebp
+
+	movd rsi, xmm1
+	movd rdi, xmm2
+	movd rbp, xmm11
+	movd r15, xmm12
+	movd rdx, xmm13
+	mov rcx, [rsp+112]
+
+	mov rbx, r8
+	mov	rax, r8
+	mul	rdx
+	and	ebp, 2097136
+	mov	r8, rax
+	movd	xmm1, rdx
+	movd	xmm0, r8
+	punpcklqdq xmm1, xmm0
+	pxor	xmm1, XMMWORD PTR [rcx+rsi]
+	xor	esi, 48
+	paddq	xmm1, xmm7
+	movdqu	xmm2, XMMWORD PTR [rsi+rcx]
+	xor	rdx, QWORD PTR [rsi+rcx]
+	paddq	xmm2, xmm3
+	xor	r8, QWORD PTR [rsi+rcx+8]
+	movdqu	XMMWORD PTR [rsi+rcx], xmm1
+	xor	esi, 16
+	mov	eax, esi
+	mov	rsi, rcx
+	movdqu	xmm0, XMMWORD PTR [rax+rcx]
+	movdqu	XMMWORD PTR [rax+rcx], xmm2
+	paddq	xmm0, xmm9
+	add	r12, r8
+	xor	rax, 32
+	add	r14, rdx
+	movdqa	xmm9, xmm7
+	movdqa	xmm7, xmm6
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	mov	QWORD PTR [r9+8], r12
+	xor	r12, r10
+	mov	QWORD PTR [r9], r14
+	movd rcx, xmm15
+	xor	r14, rbx
+	mov	r10d, ebp
+	mov	ebx, r14d
+	xor	ebp, 16
+	and	ebx, 2097136
+	mov	r8, QWORD PTR [r10+rcx]
+	mov	r9, QWORD PTR [r10+rcx+8]
+
+	movd xmm0, rsp
+	movd xmm1, rbx
+	movd xmm2, rsi
+	movd xmm11, rdi
+	movd xmm12, rbp
+	movd xmm13, r15
+	mov [rsp+104], rcx
+
+	mov ebx, DWORD PTR [rsp]
+	mov esi, DWORD PTR [rsp+4]
+	mov edi, DWORD PTR [rsp+8]
+	mov ebp, DWORD PTR [rsp+12]
+
+	lea	eax, [ebx+esi]
+	lea	edx, [edi+ebp]
+	shl rdx, 32
+	or	rax, rdx
+
+	xor r8, rax
+	movd xmm3, r8
+
+	movd esp, xmm4
+	pextrd r15d, xmm4, 2
+	movd eax, xmm8
+	movd edx, xmm10
+
+CryptonightR_template_double_part3:
+
+	movd rsp, xmm0
+	mov DWORD PTR [rsp], ebx
+	mov DWORD PTR [rsp+4], esi
+	mov DWORD PTR [rsp+8], edi
+	mov DWORD PTR [rsp+12], ebp
+
+	movd rbx, xmm1
+	movd rsi, xmm2
+	movd rdi, xmm11
+	movd rbp, xmm12
+	movd r15, xmm13
+	mov rcx, [rsp+104]
+
+	mov rax, r8
+	mul	rdi
+	movd	xmm1, rdx
+	movd	xmm0, rax
+	punpcklqdq xmm1, xmm0
+	mov	rdi, rcx
+	mov	r8, rax
+	pxor	xmm1, XMMWORD PTR [rbp+rcx]
+	xor	ebp, 48
+	paddq	xmm1, xmm8
+	xor	r8, QWORD PTR [rbp+rcx+8]
+	xor	rdx, QWORD PTR [rbp+rcx]
+	add	r13, r8
+	movdqu	xmm2, XMMWORD PTR [rbp+rcx]
+	add	r15, rdx
+	movdqu	XMMWORD PTR [rbp+rcx], xmm1
+	paddq	xmm2, xmm4
+	xor	ebp, 16
+	mov	eax, ebp
+	xor	rax, 32
+	movdqu	xmm0, XMMWORD PTR [rbp+rcx]
+	movdqu	XMMWORD PTR [rbp+rcx], xmm2
+	paddq	xmm0, xmm10
+	movdqu	XMMWORD PTR [rax+rcx], xmm0
+	movd rax, xmm3
+	movdqa	xmm10, xmm8
+	mov	QWORD PTR [r10+rcx], r15
+	movdqa	xmm8, xmm5
+	xor	r15, rax
+	mov	QWORD PTR [r10+rcx+8], r13
+	mov	r8d, r15d
+	xor	r13, r9
+	and	r8d, 2097136
+	dec r11d
+	jnz	CryptonightR_template_double_mainloop
+
+CryptonightR_template_double_part4:
+
+	mov	rbx, QWORD PTR [rsp+400]
+	movaps	xmm6, XMMWORD PTR [rsp+160]
+	movaps	xmm7, XMMWORD PTR [rsp+176]
+	movaps	xmm8, XMMWORD PTR [rsp+192]
+	movaps	xmm9, XMMWORD PTR [rsp+208]
+	movaps	xmm10, XMMWORD PTR [rsp+224]
+	movaps	xmm11, XMMWORD PTR [rsp+240]
+	movaps	xmm12, XMMWORD PTR [rsp+256]
+	movaps	xmm13, XMMWORD PTR [rsp+272]
+	movaps	xmm14, XMMWORD PTR [rsp+288]
+	movaps	xmm15, XMMWORD PTR [rsp+304]
+	add	rsp, 320
+	pop	r15
+	pop	r14
+	pop	r13
+	pop	r12
+	pop	rdi
+	pop	rsi
+	pop	rbp
+	ret	0
+CryptonightR_template_double_end:

src/crypto/cn_gpu_arm.cpp

@@ -0,0 +1,240 @@
+/* XMRig
+ * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
+ * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
+ * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
+ * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
+ * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
+ *
+ *   This program is free software: you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, either version 3 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#include <arm_neon.h>
+
+
+#include "crypto/CryptoNight_constants.h"
+
+
+inline void vandq_f32(float32x4_t &v, uint32_t v2)
+{
+    uint32x4_t vc = vdupq_n_u32(v2);
+    v = (float32x4_t)vandq_u32((uint32x4_t)v, vc);
+}
+
+
+inline void vorq_f32(float32x4_t &v, uint32_t v2)
+{
+    uint32x4_t vc = vdupq_n_u32(v2);
+    v = (float32x4_t)vorrq_u32((uint32x4_t)v, vc);
+}
+
+
+template <size_t v>
+inline void vrot_si32(int32x4_t &r)
+{
+    r = (int32x4_t)vextq_s8((int8x16_t)r, (int8x16_t)r, v);
+}
+
+template <>
+inline void vrot_si32<0>(int32x4_t &r)
+{
+}
+
+
+inline uint32_t vheor_s32(const int32x4_t &v)
+{
+    int32x4_t v0 = veorq_s32(v, vrev64q_s32(v));
+    int32x2_t vf = veor_s32(vget_high_s32(v0), vget_low_s32(v0));
+    return (uint32_t)vget_lane_s32(vf, 0);
+}
+
+
+inline void prep_dv(int32_t *idx, int32x4_t &v, float32x4_t &n)
+{
+    v = vld1q_s32(idx);
+    n = vcvtq_f32_s32(v);
+}
+
+
+inline void sub_round(const float32x4_t &n0, const float32x4_t &n1, const float32x4_t &n2, const float32x4_t &n3, const float32x4_t &rnd_c, float32x4_t &n, float32x4_t &d, float32x4_t &c)
+{
+    float32x4_t ln1 = vaddq_f32(n1, c);
+    float32x4_t nn = vmulq_f32(n0, c);
+    nn = vmulq_f32(ln1, vmulq_f32(nn, nn));
+    vandq_f32(nn, 0xFEFFFFFF);
+    vorq_f32(nn, 0x00800000);
+    n = vaddq_f32(n, nn);
+
+    float32x4_t ln3 = vsubq_f32(n3, c);
+    float32x4_t dd = vmulq_f32(n2, c);
+    dd = vmulq_f32(ln3, vmulq_f32(dd, dd));
+    vandq_f32(dd, 0xFEFFFFFF);
+    vorq_f32(dd, 0x00800000);
+    d = vaddq_f32(d, dd);
+
+    //Constant feedback
+    c = vaddq_f32(c, rnd_c);
+    c = vaddq_f32(c, vdupq_n_f32(0.734375f));
+    float32x4_t r = vaddq_f32(nn, dd);
+    vandq_f32(r, 0x807FFFFF);
+    vorq_f32(r, 0x40000000);
+    c = vaddq_f32(c, r);
+}
+
+
+inline void round_compute(const float32x4_t &n0, const float32x4_t &n1, const float32x4_t &n2, const float32x4_t &n3, const float32x4_t &rnd_c, float32x4_t &c, float32x4_t &r)
+{
+    float32x4_t n = vdupq_n_f32(0.0f), d = vdupq_n_f32(0.0f);
+
+    sub_round(n0, n1, n2, n3, rnd_c, n, d, c);
+    sub_round(n1, n2, n3, n0, rnd_c, n, d, c);
+    sub_round(n2, n3, n0, n1, rnd_c, n, d, c);
+    sub_round(n3, n0, n1, n2, rnd_c, n, d, c);
+    sub_round(n3, n2, n1, n0, rnd_c, n, d, c);
+    sub_round(n2, n1, n0, n3, rnd_c, n, d, c);
+    sub_round(n1, n0, n3, n2, rnd_c, n, d, c);
+    sub_round(n0, n3, n2, n1, rnd_c, n, d, c);
+
+    // Make sure abs(d) > 2.0 - this prevents division by zero and accidental overflows by division by < 1.0
+    vandq_f32(d, 0xFF7FFFFF);
+    vorq_f32(d, 0x40000000);
+    r = vaddq_f32(r, vdivq_f32(n, d));
+}
+
+
+// 112×4 = 448
+template <bool add>
+inline int32x4_t single_compute(const float32x4_t &n0, const float32x4_t &n1, const float32x4_t &n2, const float32x4_t &n3, float cnt, const float32x4_t &rnd_c, float32x4_t &sum)
+{
+    float32x4_t c = vdupq_n_f32(cnt);
+    float32x4_t r = vdupq_n_f32(0.0f);
+
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+
+    // do a quick fmod by setting exp to 2
+    vandq_f32(r, 0x807FFFFF);
+    vorq_f32(r, 0x40000000);
+
+    if (add) {
+        sum = vaddq_f32(sum, r);
+    } else {
+        sum = r;
+    }
+
+    const float32x4_t cc2 = vdupq_n_f32(536870880.0f);
+    r = vmulq_f32(r, cc2); // 35
+    return vcvtq_s32_f32(r);
+}
+
+
+template<size_t rot>
+inline void single_compute_wrap(const float32x4_t &n0, const float32x4_t &n1, const float32x4_t &n2, const float32x4_t &n3, float cnt, const float32x4_t &rnd_c, float32x4_t &sum, int32x4_t &out)
+{
+    int32x4_t r = single_compute<rot % 2 != 0>(n0, n1, n2, n3, cnt, rnd_c, sum);
+    vrot_si32<rot>(r);
+    out = veorq_s32(out, r);
+}
+
+
+template<uint32_t MASK>
+inline int32_t *scratchpad_ptr(uint8_t* lpad, uint32_t idx, size_t n) { return reinterpret_cast<int32_t *>(lpad + (idx & MASK) + n * 16); }
+
+
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_arm(const uint8_t *spad, uint8_t *lpad)
+{
+    uint32_t s = reinterpret_cast<const uint32_t*>(spad)[0] >> 8;
+    int32_t *idx0 = scratchpad_ptr<MASK>(lpad, s, 0);
+    int32_t *idx1 = scratchpad_ptr<MASK>(lpad, s, 1);
+    int32_t *idx2 = scratchpad_ptr<MASK>(lpad, s, 2);
+    int32_t *idx3 = scratchpad_ptr<MASK>(lpad, s, 3);
+    float32x4_t sum0 = vdupq_n_f32(0.0f);
+
+    for (size_t i = 0; i < ITER; i++) {
+        float32x4_t n0, n1, n2, n3;
+        int32x4_t v0, v1, v2, v3;
+        float32x4_t suma, sumb, sum1, sum2, sum3;
+
+        prep_dv(idx0, v0, n0);
+        prep_dv(idx1, v1, n1);
+        prep_dv(idx2, v2, n2);
+        prep_dv(idx3, v3, n3);
+        float32x4_t rc = sum0;
+
+        int32x4_t out, out2;
+        out = vdupq_n_s32(0);
+        single_compute_wrap<0>(n0, n1, n2, n3, 1.3437500f, rc, suma, out);
+        single_compute_wrap<1>(n0, n2, n3, n1, 1.2812500f, rc, suma, out);
+        single_compute_wrap<2>(n0, n3, n1, n2, 1.3593750f, rc, sumb, out);
+        single_compute_wrap<3>(n0, n3, n2, n1, 1.3671875f, rc, sumb, out);
+        sum0 = vaddq_f32(suma, sumb);
+        vst1q_s32(idx0, veorq_s32(v0, out));
+        out2 = out;
+
+        out = vdupq_n_s32(0);
+        single_compute_wrap<0>(n1, n0, n2, n3, 1.4296875f, rc, suma, out);
+        single_compute_wrap<1>(n1, n2, n3, n0, 1.3984375f, rc, suma, out);
+        single_compute_wrap<2>(n1, n3, n0, n2, 1.3828125f, rc, sumb, out);
+        single_compute_wrap<3>(n1, n3, n2, n0, 1.3046875f, rc, sumb, out);
+        sum1 = vaddq_f32(suma, sumb);
+        vst1q_s32(idx1, veorq_s32(v1, out));
+        out2 = veorq_s32(out2, out);
+
+        out = vdupq_n_s32(0);
+        single_compute_wrap<0>(n2, n1, n0, n3, 1.4140625f, rc, suma, out);
+        single_compute_wrap<1>(n2, n0, n3, n1, 1.2734375f, rc, suma, out);
+        single_compute_wrap<2>(n2, n3, n1, n0, 1.2578125f, rc, sumb, out);
+        single_compute_wrap<3>(n2, n3, n0, n1, 1.2890625f, rc, sumb, out);
+        sum2 = vaddq_f32(suma, sumb);
+        vst1q_s32(idx2, veorq_s32(v2, out));
+        out2 = veorq_s32(out2, out);
+
+        out = vdupq_n_s32(0);
+        single_compute_wrap<0>(n3, n1, n2, n0, 1.3203125f, rc, suma, out);
+        single_compute_wrap<1>(n3, n2, n0, n1, 1.3515625f, rc, suma, out);
+        single_compute_wrap<2>(n3, n0, n1, n2, 1.3359375f, rc, sumb, out);
+        single_compute_wrap<3>(n3, n0, n2, n1, 1.4609375f, rc, sumb, out);
+        sum3 = vaddq_f32(suma, sumb);
+        vst1q_s32(idx3, veorq_s32(v3, out));
+        out2 = veorq_s32(out2, out);
+
+        sum0 = vaddq_f32(sum0, sum1);
+        sum2 = vaddq_f32(sum2, sum3);
+        sum0 = vaddq_f32(sum0, sum2);
+
+        const float32x4_t cc1 = vdupq_n_f32(16777216.0f);
+        const float32x4_t cc2 = vdupq_n_f32(64.0f);
+        vandq_f32(sum0, 0x7fffffff); // take abs(va) by masking the float sign bit
+        // vs range 0 - 64
+        n0 = vmulq_f32(sum0, cc1);
+        v0 = vcvtq_s32_f32(n0);
+        v0 = veorq_s32(v0, out2);
+        uint32_t n = vheor_s32(v0);
+
+        // vs is now between 0 and 1
+        sum0 = vdivq_f32(sum0, cc2);
+        idx0 = scratchpad_ptr<MASK>(lpad, n, 0);
+        idx1 = scratchpad_ptr<MASK>(lpad, n, 1);
+        idx2 = scratchpad_ptr<MASK>(lpad, n, 2);
+        idx3 = scratchpad_ptr<MASK>(lpad, n, 3);
+    }
+}
+
+template void cn_gpu_inner_arm<xmrig::CRYPTONIGHT_GPU_ITER, xmrig::CRYPTONIGHT_GPU_MASK>(const uint8_t* spad, uint8_t* lpad);

src/crypto/cn_gpu_avx.cpp

@@ -0,0 +1,203 @@
+/* XMRig
+ * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
+ * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
+ * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
+ * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
+ * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
+ *
+ *   This program is free software: you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, either version 3 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "crypto/CryptoNight_constants.h"
+
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#   define __restrict__ __restrict
+#endif
+
+inline void prep_dv_avx(__m256i* idx, __m256i& v, __m256& n01)
+{
+    v = _mm256_load_si256(idx);
+    n01 = _mm256_cvtepi32_ps(v);
+}
+
+inline __m256 fma_break(const __m256& x) 
+{ 
+    // Break the dependency chain by setitng the exp to ?????01 
+    __m256 xx = _mm256_and_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0xFEFFFFFF)), x); 
+    return _mm256_or_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x00800000)), xx); 
+}
+
+// 14
+inline void sub_round(const __m256& n0, const __m256& n1, const __m256& n2, const __m256& n3, const __m256& rnd_c, __m256& n, __m256& d, __m256& c)
+{
+    __m256 nn = _mm256_mul_ps(n0, c);
+    nn = _mm256_mul_ps(_mm256_add_ps(n1, c), _mm256_mul_ps(nn, nn));
+    nn = fma_break(nn);
+    n = _mm256_add_ps(n, nn);
+
+    __m256 dd = _mm256_mul_ps(n2, c);
+    dd = _mm256_mul_ps(_mm256_sub_ps(n3, c), _mm256_mul_ps(dd, dd));
+    dd = fma_break(dd);
+    d = _mm256_add_ps(d, dd);
+
+    //Constant feedback
+    c = _mm256_add_ps(c, rnd_c);
+    c = _mm256_add_ps(c, _mm256_set1_ps(0.734375f));
+    __m256 r = _mm256_add_ps(nn, dd);
+    r = _mm256_and_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x807FFFFF)), r);
+    r = _mm256_or_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x40000000)), r);
+    c = _mm256_add_ps(c, r);
+}
+
+// 14*8 + 2 = 112
+inline void round_compute(const __m256& n0, const __m256& n1, const __m256& n2, const __m256& n3, const __m256& rnd_c, __m256& c, __m256& r)
+{
+    __m256 n = _mm256_setzero_ps(), d = _mm256_setzero_ps();
+
+    sub_round(n0, n1, n2, n3, rnd_c, n, d, c);
+    sub_round(n1, n2, n3, n0, rnd_c, n, d, c);
+    sub_round(n2, n3, n0, n1, rnd_c, n, d, c);
+    sub_round(n3, n0, n1, n2, rnd_c, n, d, c);
+    sub_round(n3, n2, n1, n0, rnd_c, n, d, c);
+    sub_round(n2, n1, n0, n3, rnd_c, n, d, c);
+    sub_round(n1, n0, n3, n2, rnd_c, n, d, c);
+    sub_round(n0, n3, n2, n1, rnd_c, n, d, c);
+
+    // Make sure abs(d) > 2.0 - this prevents division by zero and accidental overflows by division by < 1.0
+    d = _mm256_and_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0xFF7FFFFF)), d);
+    d = _mm256_or_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x40000000)), d);
+    r = _mm256_add_ps(r, _mm256_div_ps(n, d));
+}
+
+// 112×4 = 448
+template <bool add>
+inline __m256i double_compute(const __m256& n0, const __m256& n1, const __m256& n2, const __m256& n3,
+                              float lcnt, float hcnt, const __m256& rnd_c, __m256& sum)
+{
+    __m256 c = _mm256_insertf128_ps(_mm256_castps128_ps256(_mm_set1_ps(lcnt)), _mm_set1_ps(hcnt), 1);
+    __m256 r = _mm256_setzero_ps();
+
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+
+    // do a quick fmod by setting exp to 2
+    r = _mm256_and_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x807FFFFF)), r);
+    r = _mm256_or_ps(_mm256_castsi256_ps(_mm256_set1_epi32(0x40000000)), r);
+
+    if(add)
+        sum = _mm256_add_ps(sum, r);
+    else
+        sum = r;
+
+    r = _mm256_mul_ps(r, _mm256_set1_ps(536870880.0f)); // 35
+    return _mm256_cvttps_epi32(r);
+}
+
+template <size_t rot>
+inline void double_compute_wrap(const __m256& n0, const __m256& n1, const __m256& n2, const __m256& n3,
+                                float lcnt, float hcnt, const __m256& rnd_c, __m256& sum, __m256i& out)
+{
+    __m256i r = double_compute<rot % 2 != 0>(n0, n1, n2, n3, lcnt, hcnt, rnd_c, sum);
+    if(rot != 0)
+        r = _mm256_or_si256(_mm256_bslli_epi128(r, 16 - rot), _mm256_bsrli_epi128(r, rot));
+
+    out = _mm256_xor_si256(out, r);
+}
+
+template<uint32_t MASK>
+inline __m256i* scratchpad_ptr(uint8_t* lpad, uint32_t idx, size_t n) { return reinterpret_cast<__m256i*>(lpad + (idx & MASK) + n*16); }
+
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_avx(const uint8_t* spad, uint8_t* lpad)
+{
+    uint32_t s = reinterpret_cast<const uint32_t*>(spad)[0] >> 8;
+    __m256i* idx0 = scratchpad_ptr<MASK>(lpad, s, 0);
+    __m256i* idx2 = scratchpad_ptr<MASK>(lpad, s, 2);
+    __m256 sum0 = _mm256_setzero_ps();
+
+    for(size_t i = 0; i < ITER; i++)
+    {
+        __m256i v01, v23;
+        __m256 suma, sumb, sum1;
+        __m256 rc = sum0;
+
+        __m256 n01, n23;
+        prep_dv_avx(idx0, v01, n01);
+        prep_dv_avx(idx2, v23, n23);
+        
+        __m256i out, out2;
+        __m256 n10, n22, n33;
+        n10 = _mm256_permute2f128_ps(n01, n01, 0x01);
+        n22 = _mm256_permute2f128_ps(n23, n23, 0x00);
+        n33 = _mm256_permute2f128_ps(n23, n23, 0x11);
+        
+        out = _mm256_setzero_si256();
+        double_compute_wrap<0>(n01, n10, n22, n33, 1.3437500f, 1.4296875f, rc, suma, out);
+        double_compute_wrap<1>(n01, n22, n33, n10, 1.2812500f, 1.3984375f, rc, suma, out);
+        double_compute_wrap<2>(n01, n33, n10, n22, 1.3593750f, 1.3828125f, rc, sumb, out);
+        double_compute_wrap<3>(n01, n33, n22, n10, 1.3671875f, 1.3046875f, rc, sumb, out);
+        _mm256_store_si256(idx0, _mm256_xor_si256(v01, out));
+        sum0 = _mm256_add_ps(suma, sumb);
+        out2 = out;
+        
+        __m256 n11, n02, n30;
+        n11 = _mm256_permute2f128_ps(n01, n01, 0x11);
+        n02 = _mm256_permute2f128_ps(n01, n23, 0x20);
+        n30 = _mm256_permute2f128_ps(n01, n23, 0x03);
+
+        out = _mm256_setzero_si256();
+        double_compute_wrap<0>(n23, n11, n02, n30, 1.4140625f, 1.3203125f, rc, suma, out);
+        double_compute_wrap<1>(n23, n02, n30, n11, 1.2734375f, 1.3515625f, rc, suma, out);
+        double_compute_wrap<2>(n23, n30, n11, n02, 1.2578125f, 1.3359375f, rc, sumb, out);
+        double_compute_wrap<3>(n23, n30, n02, n11, 1.2890625f, 1.4609375f, rc, sumb, out);
+        _mm256_store_si256(idx2, _mm256_xor_si256(v23, out));
+        sum1 = _mm256_add_ps(suma, sumb);
+
+        out2 = _mm256_xor_si256(out2, out);
+        out2 = _mm256_xor_si256(_mm256_permute2x128_si256(out2,out2,0x41), out2);
+        suma = _mm256_permute2f128_ps(sum0, sum1, 0x30);
+        sumb = _mm256_permute2f128_ps(sum0, sum1, 0x21);
+        sum0 = _mm256_add_ps(suma, sumb);
+        sum0 = _mm256_add_ps(sum0, _mm256_permute2f128_ps(sum0, sum0, 0x41));
+
+        // Clear the high 128 bits
+        __m128 sum = _mm256_castps256_ps128(sum0);
+
+        sum = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0x7fffffff)), sum); // take abs(va) by masking the float sign bit
+        // vs range 0 - 64 
+        __m128i v0 = _mm_cvttps_epi32(_mm_mul_ps(sum, _mm_set1_ps(16777216.0f)));
+        v0 = _mm_xor_si128(v0, _mm256_castsi256_si128(out2));
+        __m128i v1 = _mm_shuffle_epi32(v0, _MM_SHUFFLE(0, 1, 2, 3));
+        v0 = _mm_xor_si128(v0, v1);
+        v1 = _mm_shuffle_epi32(v0, _MM_SHUFFLE(0, 1, 0, 1));
+        v0 = _mm_xor_si128(v0, v1);
+
+        // vs is now between 0 and 1
+        sum = _mm_div_ps(sum, _mm_set1_ps(64.0f));
+        sum0 = _mm256_insertf128_ps(_mm256_castps128_ps256(sum), sum, 1);
+        uint32_t n = _mm_cvtsi128_si32(v0);
+        idx0 = scratchpad_ptr<MASK>(lpad, n, 0);
+        idx2 = scratchpad_ptr<MASK>(lpad, n, 2);
+    }
+}
+
+template void cn_gpu_inner_avx<xmrig::CRYPTONIGHT_GPU_ITER, xmrig::CRYPTONIGHT_GPU_MASK>(const uint8_t* spad, uint8_t* lpad);

src/crypto/cn_gpu_ssse3.cpp

@@ -0,0 +1,210 @@
+/* XMRig
+ * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
+ * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
+ * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
+ * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
+ * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
+ * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <support@xmrig.com>
+ *
+ *   This program is free software: you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, either version 3 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "crypto/CryptoNight_constants.h"
+
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#   define __restrict__ __restrict
+#endif
+
+inline void prep_dv(__m128i* idx, __m128i& v, __m128& n)
+{
+    v = _mm_load_si128(idx);
+    n = _mm_cvtepi32_ps(v);
+}
+
+inline __m128 fma_break(__m128 x) 
+{ 
+    // Break the dependency chain by setitng the exp to ?????01 
+    x = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0xFEFFFFFF)), x); 
+    return _mm_or_ps(_mm_castsi128_ps(_mm_set1_epi32(0x00800000)), x); 
+}
+
+// 14
+inline void sub_round(__m128 n0, __m128 n1, __m128 n2, __m128 n3, __m128 rnd_c, __m128& n, __m128& d, __m128& c)
+{
+    n1 = _mm_add_ps(n1, c);
+    __m128 nn = _mm_mul_ps(n0, c);
+    nn = _mm_mul_ps(n1, _mm_mul_ps(nn,nn));
+    nn = fma_break(nn);
+    n = _mm_add_ps(n, nn);
+
+    n3 = _mm_sub_ps(n3, c);
+    __m128 dd = _mm_mul_ps(n2, c);
+    dd = _mm_mul_ps(n3, _mm_mul_ps(dd,dd));
+    dd = fma_break(dd);
+    d = _mm_add_ps(d, dd);
+
+    //Constant feedback
+    c = _mm_add_ps(c, rnd_c);
+    c = _mm_add_ps(c, _mm_set1_ps(0.734375f));
+    __m128 r = _mm_add_ps(nn, dd);
+    r = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0x807FFFFF)), r);
+    r = _mm_or_ps(_mm_castsi128_ps(_mm_set1_epi32(0x40000000)), r);
+    c = _mm_add_ps(c, r);
+}
+
+// 14*8 + 2 = 112
+inline void round_compute(__m128 n0, __m128 n1, __m128 n2, __m128 n3, __m128 rnd_c, __m128& c, __m128& r)
+{
+    __m128 n = _mm_setzero_ps(), d = _mm_setzero_ps();
+
+    sub_round(n0, n1, n2, n3, rnd_c, n, d, c);
+    sub_round(n1, n2, n3, n0, rnd_c, n, d, c);
+    sub_round(n2, n3, n0, n1, rnd_c, n, d, c);
+    sub_round(n3, n0, n1, n2, rnd_c, n, d, c);
+    sub_round(n3, n2, n1, n0, rnd_c, n, d, c);
+    sub_round(n2, n1, n0, n3, rnd_c, n, d, c);
+    sub_round(n1, n0, n3, n2, rnd_c, n, d, c);
+    sub_round(n0, n3, n2, n1, rnd_c, n, d, c);
+
+    // Make sure abs(d) > 2.0 - this prevents division by zero and accidental overflows by division by < 1.0
+    d = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0xFF7FFFFF)), d);
+    d = _mm_or_ps(_mm_castsi128_ps(_mm_set1_epi32(0x40000000)), d);
+    r =_mm_add_ps(r, _mm_div_ps(n,d));
+}
+
+// 112×4 = 448
+template<bool add>
+inline __m128i single_compute(__m128 n0, __m128 n1,  __m128 n2,  __m128 n3, float cnt, __m128 rnd_c, __m128& sum)
+{
+    __m128 c = _mm_set1_ps(cnt);
+    __m128 r = _mm_setzero_ps();
+
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+    round_compute(n0, n1, n2, n3, rnd_c, c, r);
+
+    // do a quick fmod by setting exp to 2
+    r = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0x807FFFFF)), r);
+    r = _mm_or_ps(_mm_castsi128_ps(_mm_set1_epi32(0x40000000)), r);
+
+    if(add)
+        sum = _mm_add_ps(sum, r);
+    else
+        sum = r;
+
+    r = _mm_mul_ps(r, _mm_set1_ps(536870880.0f)); // 35
+    return _mm_cvttps_epi32(r);
+}
+
+template<size_t rot>
+inline void single_compute_wrap(__m128 n0, __m128 n1, __m128 n2,  __m128 n3, float cnt, __m128 rnd_c, __m128& sum, __m128i& out)
+{
+    __m128i r = single_compute<rot % 2 != 0>(n0, n1, n2, n3, cnt, rnd_c, sum);
+    if(rot != 0)
+        r = _mm_or_si128(_mm_slli_si128(r, 16 - rot), _mm_srli_si128(r, rot));
+    out = _mm_xor_si128(out, r);
+}
+
+template<uint32_t MASK>
+inline __m128i* scratchpad_ptr(uint8_t* lpad, uint32_t idx, size_t n) { return reinterpret_cast<__m128i*>(lpad + (idx & MASK) + n*16); }
+
+template<size_t ITER, uint32_t MASK>
+void cn_gpu_inner_ssse3(const uint8_t* spad, uint8_t* lpad)
+{
+    uint32_t s = reinterpret_cast<const uint32_t*>(spad)[0] >> 8;
+    __m128i* idx0 = scratchpad_ptr<MASK>(lpad, s, 0);
+    __m128i* idx1 = scratchpad_ptr<MASK>(lpad, s, 1);
+    __m128i* idx2 = scratchpad_ptr<MASK>(lpad, s, 2);
+    __m128i* idx3 = scratchpad_ptr<MASK>(lpad, s, 3);
+    __m128 sum0 = _mm_setzero_ps();
+    
+    for(size_t i = 0; i < ITER; i++)
+    {
+        __m128 n0, n1, n2, n3;
+        __m128i v0, v1, v2, v3;
+        __m128 suma, sumb, sum1, sum2, sum3;
+        
+        prep_dv(idx0, v0, n0);
+        prep_dv(idx1, v1, n1);
+        prep_dv(idx2, v2, n2);
+        prep_dv(idx3, v3, n3);
+        __m128 rc = sum0;
+
+        __m128i out, out2;
+        out = _mm_setzero_si128();
+        single_compute_wrap<0>(n0, n1, n2, n3, 1.3437500f, rc, suma, out);
+        single_compute_wrap<1>(n0, n2, n3, n1, 1.2812500f, rc, suma, out);
+        single_compute_wrap<2>(n0, n3, n1, n2, 1.3593750f, rc, sumb, out);
+        single_compute_wrap<3>(n0, n3, n2, n1, 1.3671875f, rc, sumb, out);
+        sum0 = _mm_add_ps(suma, sumb);
+        _mm_store_si128(idx0, _mm_xor_si128(v0, out));
+        out2 = out;
+    
+        out = _mm_setzero_si128();
+        single_compute_wrap<0>(n1, n0, n2, n3, 1.4296875f, rc, suma, out);
+        single_compute_wrap<1>(n1, n2, n3, n0, 1.3984375f, rc, suma, out);
+        single_compute_wrap<2>(n1, n3, n0, n2, 1.3828125f, rc, sumb, out);
+        single_compute_wrap<3>(n1, n3, n2, n0, 1.3046875f, rc, sumb, out);
+        sum1 = _mm_add_ps(suma, sumb);
+        _mm_store_si128(idx1, _mm_xor_si128(v1, out));
+        out2 = _mm_xor_si128(out2, out);
+
+        out = _mm_setzero_si128();
+        single_compute_wrap<0>(n2, n1, n0, n3, 1.4140625f, rc, suma, out);
+        single_compute_wrap<1>(n2, n0, n3, n1, 1.2734375f, rc, suma, out);
+        single_compute_wrap<2>(n2, n3, n1, n0, 1.2578125f, rc, sumb, out);
+        single_compute_wrap<3>(n2, n3, n0, n1, 1.2890625f, rc, sumb, out);
+        sum2 = _mm_add_ps(suma, sumb);
+        _mm_store_si128(idx2, _mm_xor_si128(v2, out));
+        out2 = _mm_xor_si128(out2, out);
+
+        out = _mm_setzero_si128();
+        single_compute_wrap<0>(n3, n1, n2, n0, 1.3203125f, rc, suma, out);
+        single_compute_wrap<1>(n3, n2, n0, n1, 1.3515625f, rc, suma, out);
+        single_compute_wrap<2>(n3, n0, n1, n2, 1.3359375f, rc, sumb, out);
+        single_compute_wrap<3>(n3, n0, n2, n1, 1.4609375f, rc, sumb, out);
+        sum3 = _mm_add_ps(suma, sumb);
+        _mm_store_si128(idx3, _mm_xor_si128(v3, out));
+        out2 = _mm_xor_si128(out2, out);
+        sum0 = _mm_add_ps(sum0, sum1);
+        sum2 = _mm_add_ps(sum2, sum3);
+        sum0 = _mm_add_ps(sum0, sum2);
+
+        sum0 = _mm_and_ps(_mm_castsi128_ps(_mm_set1_epi32(0x7fffffff)), sum0); // take abs(va) by masking the float sign bit
+        // vs range 0 - 64 
+        n0 = _mm_mul_ps(sum0, _mm_set1_ps(16777216.0f));
+        v0 = _mm_cvttps_epi32(n0);
+        v0 = _mm_xor_si128(v0, out2);
+        v1 = _mm_shuffle_epi32(v0, _MM_SHUFFLE(0, 1, 2, 3));
+        v0 = _mm_xor_si128(v0, v1);
+        v1 = _mm_shuffle_epi32(v0, _MM_SHUFFLE(0, 1, 0, 1));
+        v0 = _mm_xor_si128(v0, v1);
+
+        // vs is now between 0 and 1
+        sum0 = _mm_div_ps(sum0, _mm_set1_ps(64.0f));
+        uint32_t n = _mm_cvtsi128_si32(v0);
+        idx0 = scratchpad_ptr<MASK>(lpad, n, 0);
+        idx1 = scratchpad_ptr<MASK>(lpad, n, 1);
+        idx2 = scratchpad_ptr<MASK>(lpad, n, 2);
+        idx3 = scratchpad_ptr<MASK>(lpad, n, 3);
+    }
+}
+
+template void cn_gpu_inner_ssse3<xmrig::CRYPTONIGHT_GPU_ITER, xmrig::CRYPTONIGHT_GPU_MASK>(const uint8_t* spad, uint8_t* lpad);

src/crypto/variant4_random_math.h

@@ -0,0 +1,428 @@
+#ifndef VARIANT4_RANDOM_MATH_H
+#define VARIANT4_RANDOM_MATH_H
+
+extern "C"
+{
+    #include "c_blake256.h"
+}
+
+enum V4_Settings
+{
+	// Generate code with minimal theoretical latency = 45 cycles, which is equivalent to 15 multiplications
+	TOTAL_LATENCY = 15 * 3,
+	
+	// Always generate at least 60 instructions
+	NUM_INSTRUCTIONS = 60,
+	
+	// Available ALUs for MUL
+	// Modern CPUs typically have only 1 ALU which can do multiplications
+	ALU_COUNT_MUL = 1,
+
+	// Total available ALUs
+	// Modern CPUs have 4 ALUs, but we use only 3 because random math executes together with other main loop code
+	ALU_COUNT = 3,
+};
+
+enum V4_InstructionList
+{
+	MUL,	// a*b
+	ADD,	// a+b + C, C is an unsigned 32-bit constant
+	SUB,	// a-b
+	ROR,	// rotate right "a" by "b & 31" bits
+	ROL,	// rotate left "a" by "b & 31" bits
+	XOR,	// a^b
+	RET,	// finish execution
+	V4_INSTRUCTION_COUNT = RET,
+};
+
+// V4_InstructionDefinition is used to generate code from random data
+// Every random sequence of bytes is a valid code
+//
+// There are 8 registers in total:
+// - 4 variable registers
+// - 4 constant registers initialized from loop variables
+//
+// This is why dst_index is 2 bits
+enum V4_InstructionDefinition
+{
+	V4_OPCODE_BITS = 3,
+	V4_DST_INDEX_BITS = 2,
+	V4_SRC_INDEX_BITS = 3,
+};
+
+struct V4_Instruction
+{
+	uint8_t opcode;
+	uint8_t dst_index;
+	uint8_t src_index;
+	uint32_t C;
+};
+
+#ifndef FORCEINLINE
+#ifdef __GNUC__
+#define FORCEINLINE __attribute__((always_inline)) inline
+#elif _MSC_VER
+#define FORCEINLINE __forceinline
+#else
+#define FORCEINLINE inline
+#endif
+#endif
+
+#ifndef UNREACHABLE_CODE
+#ifdef __GNUC__
+#define UNREACHABLE_CODE __builtin_unreachable()
+#elif _MSC_VER
+#define UNREACHABLE_CODE __assume(false)
+#else
+#define UNREACHABLE_CODE
+#endif
+#endif
+
+// Random math interpreter's loop is fully unrolled and inlined to achieve 100% branch prediction on CPU:
+// every switch-case will point to the same destination on every iteration of Cryptonight main loop
+//
+// This is about as fast as it can get without using low-level machine code generation
+template<typename v4_reg>
+static void v4_random_math(const struct V4_Instruction* code, v4_reg* r)
+{
+	enum
+	{
+		REG_BITS = sizeof(v4_reg) * 8,
+	};
+
+#define V4_EXEC(i) \
+	{ \
+		const struct V4_Instruction* op = code + i; \
+		const v4_reg src = r[op->src_index]; \
+		v4_reg* dst = r + op->dst_index; \
+		switch (op->opcode) \
+		{ \
+		case MUL: \
+			*dst *= src; \
+			break; \
+		case ADD: \
+			*dst += src + op->C; \
+			break; \
+		case SUB: \
+			*dst -= src; \
+			break; \
+		case ROR: \
+			{ \
+				const uint32_t shift = src % REG_BITS; \
+				*dst = (*dst >> shift) | (*dst << ((REG_BITS - shift) % REG_BITS)); \
+			} \
+			break; \
+		case ROL: \
+			{ \
+				const uint32_t shift = src % REG_BITS; \
+				*dst = (*dst << shift) | (*dst >> ((REG_BITS - shift) % REG_BITS)); \
+			} \
+			break; \
+		case XOR: \
+			*dst ^= src; \
+			break; \
+		case RET: \
+			return; \
+		default: \
+			UNREACHABLE_CODE; \
+			break; \
+		} \
+	}
+
+#define V4_EXEC_10(j) \
+	V4_EXEC(j + 0) \
+	V4_EXEC(j + 1) \
+	V4_EXEC(j + 2) \
+	V4_EXEC(j + 3) \
+	V4_EXEC(j + 4) \
+	V4_EXEC(j + 5) \
+	V4_EXEC(j + 6) \
+	V4_EXEC(j + 7) \
+	V4_EXEC(j + 8) \
+	V4_EXEC(j + 9)
+
+	// Generated program can have 60 + a few more (usually 2-3) instructions to achieve required latency
+	// I've checked all block heights < 10,000,000 and here is the distribution of program sizes:
+	//
+	// 60      28495
+	// 61      106077
+	// 62      2455855
+	// 63      5114930
+	// 64      1020868
+	// 65      1109026
+	// 66      151756
+	// 67      8429
+	// 68      4477
+	// 69      87
+
+	// Unroll 70 instructions here
+	V4_EXEC_10(0);		// instructions 0-9
+	V4_EXEC_10(10);		// instructions 10-19
+	V4_EXEC_10(20);		// instructions 20-29
+	V4_EXEC_10(30);		// instructions 30-39
+	V4_EXEC_10(40);		// instructions 40-49
+	V4_EXEC_10(50);		// instructions 50-59
+	V4_EXEC_10(60);		// instructions 60-69
+
+#undef V4_EXEC_10
+#undef V4_EXEC
+}
+
+// If we don't have enough data available, generate more
+static FORCEINLINE void check_data(size_t* data_index, const size_t bytes_needed, int8_t* data, const size_t data_size)
+{
+	if (*data_index + bytes_needed > data_size)
+	{
+		hash_extra_blake(data, data_size, (char*) data);
+		*data_index = 0;
+	}
+}
+
+// Generates as many random math operations as possible with given latency and ALU restrictions
+static int v4_random_math_init(struct V4_Instruction* code, const uint64_t height)
+{
+	// MUL is 3 cycles, 3-way addition and rotations are 2 cycles, SUB/XOR are 1 cycle
+	// These latencies match real-life instruction latencies for Intel CPUs starting from Sandy Bridge and up to Skylake/Coffee lake
+	//
+	// AMD Ryzen has the same latencies except 1-cycle ROR/ROL, so it'll be a bit faster than Intel Sandy Bridge and newer processors
+	// Surprisingly, Intel Nehalem also has 1-cycle ROR/ROL, so it'll also be faster than Intel Sandy Bridge and newer processors
+	// AMD Bulldozer has 4 cycles latency for MUL (slower than Intel) and 1 cycle for ROR/ROL (faster than Intel), so average performance will be the same
+	// Source: https://www.agner.org/optimize/instruction_tables.pdf
+	const int op_latency[V4_INSTRUCTION_COUNT] = { 3, 2, 1, 2, 2, 1 };
+
+	// Instruction latencies for theoretical ASIC implementation
+	const int asic_op_latency[V4_INSTRUCTION_COUNT] = { 3, 1, 1, 1, 1, 1 };
+
+	// Available ALUs for each instruction
+	const int op_ALUs[V4_INSTRUCTION_COUNT] = { ALU_COUNT_MUL, ALU_COUNT, ALU_COUNT, ALU_COUNT, ALU_COUNT, ALU_COUNT };
+
+	int8_t data[32];
+	memset(data, 0, sizeof(data));
+	uint64_t tmp = SWAP64LE(height);
+	memcpy(data, &tmp, sizeof(uint64_t));
+
+	// Set data_index past the last byte in data
+	// to trigger full data update with blake hash
+	// before we start using it
+	size_t data_index = sizeof(data);
+
+	int code_size;
+	do {
+		int latency[8];
+		int asic_latency[8];
+
+		// Tracks previous instruction and value of the source operand for registers R0-R3 throughout code execution
+		// byte 0: current value of the destination register
+		// byte 1: instruction opcode
+		// byte 2: current value of the source register
+		//
+		// Registers R4-R7 are constant and are treated as having the same value because when we do
+		// the same operation twice with two constant source registers, it can be optimized into a single operation
+		uint32_t inst_data[8] = { 0, 1, 2, 3, 0xFFFFFF, 0xFFFFFF, 0xFFFFFF, 0xFFFFFF };
+
+		bool alu_busy[TOTAL_LATENCY + 1][ALU_COUNT];
+		bool is_rotation[V4_INSTRUCTION_COUNT];
+		bool rotated[4];
+		int rotate_count = 0;
+
+		memset(latency, 0, sizeof(latency));
+		memset(asic_latency, 0, sizeof(asic_latency));
+		memset(alu_busy, 0, sizeof(alu_busy));
+		memset(is_rotation, 0, sizeof(is_rotation));
+		memset(rotated, 0, sizeof(rotated));
+		is_rotation[ROR] = true;
+		is_rotation[ROL] = true;
+
+		int num_retries = 0;
+		code_size = 0;
+
+		int total_iterations = 0;
+
+		// Generate random code to achieve minimal required latency for our abstract CPU
+		// Try to get this latency for all 4 registers
+		while (((latency[0] < TOTAL_LATENCY) || (latency[1] < TOTAL_LATENCY) || (latency[2] < TOTAL_LATENCY) || (latency[3] < TOTAL_LATENCY)) && (num_retries < 64))
+		{
+			// Fail-safe to guarantee loop termination
+			++total_iterations;
+			if (total_iterations > 256)
+				break;
+
+			check_data(&data_index, 1, data, sizeof(data));
+
+			const uint8_t c = ((uint8_t*)data)[data_index++];
+
+			// MUL = opcodes 0-2
+			// ADD = opcode 3
+			// SUB = opcode 4
+			// ROR/ROL = opcode 5, shift direction is selected randomly
+			// XOR = opcodes 6-7
+			uint8_t opcode = c & ((1 << V4_OPCODE_BITS) - 1);
+			if (opcode == 5)
+			{
+				check_data(&data_index, 1, data, sizeof(data));
+				opcode = (data[data_index++] >= 0) ? ROR : ROL;
+			}
+			else if (opcode >= 6)
+			{
+				opcode = XOR;
+			}
+			else
+			{
+				opcode = (opcode <= 2) ? MUL : (opcode - 2);
+			}
+
+			uint8_t dst_index = (c >> V4_OPCODE_BITS) & ((1 << V4_DST_INDEX_BITS) - 1);
+			uint8_t src_index = (c >> (V4_OPCODE_BITS + V4_DST_INDEX_BITS)) & ((1 << V4_SRC_INDEX_BITS) - 1);
+
+			const int a = dst_index;
+			int b = src_index;
+
+			// Don't do ADD/SUB/XOR with the same register
+			if (((opcode == ADD) || (opcode == SUB) || (opcode == XOR)) && (a == b))
+			{
+				// a is always < 4, so we don't need to check bounds here
+				b = a + 4;
+				src_index = b;
+			}
+
+			// Don't do rotation with the same destination twice because it's equal to a single rotation
+			if (is_rotation[opcode] && rotated[a])
+			{
+				continue;
+			}
+
+			// Don't do the same instruction (except MUL) with the same source value twice because all other cases can be optimized:
+			// 2xADD(a, b, C) = ADD(a, b*2, C1+C2), same for SUB and rotations
+			// 2xXOR(a, b) = NOP
+			if ((opcode != MUL) && ((inst_data[a] & 0xFFFF00) == (opcode << 8) + ((inst_data[b] & 255) << 16)))
+			{
+				continue;
+			}
+
+			// Find which ALU is available (and when) for this instruction
+			int next_latency = (latency[a] > latency[b]) ? latency[a] : latency[b];
+			int alu_index = -1;
+			while (next_latency < TOTAL_LATENCY)
+			{
+				for (int i = op_ALUs[opcode] - 1; i >= 0; --i)
+				{
+					if (!alu_busy[next_latency][i])
+					{
+						// ADD is implemented as two 1-cycle instructions on a real CPU, so do an additional availability check
+						if ((opcode == ADD) && alu_busy[next_latency + 1][i])
+						{
+							continue;
+						}
+
+						// Rotation can only start when previous rotation is finished, so do an additional availability check
+						if (is_rotation[opcode] && (next_latency < rotate_count * op_latency[opcode]))
+						{
+							continue;
+						}
+
+						alu_index = i;
+						break;
+					}
+				}
+				if (alu_index >= 0)
+				{
+					break;
+				}
+				++next_latency;
+			}
+
+			// Don't generate instructions that leave some register unchanged for more than 7 cycles
+			if (next_latency > latency[a] + 7)
+			{
+				continue;
+			}
+
+			next_latency += op_latency[opcode];
+
+			if (next_latency <= TOTAL_LATENCY)
+			{
+				if (is_rotation[opcode])
+				{
+					++rotate_count;
+				}
+
+				// Mark ALU as busy only for the first cycle when it starts executing the instruction because ALUs are fully pipelined
+				alu_busy[next_latency - op_latency[opcode]][alu_index] = true;
+				latency[a] = next_latency;
+
+				// ASIC is supposed to have enough ALUs to run as many independent instructions per cycle as possible, so latency calculation for ASIC is simple
+				asic_latency[a] = ((asic_latency[a] > asic_latency[b]) ? asic_latency[a] : asic_latency[b]) + asic_op_latency[opcode];
+
+				rotated[a] = is_rotation[opcode];
+
+				inst_data[a] = code_size + (opcode << 8) + ((inst_data[b] & 255) << 16);
+
+				code[code_size].opcode = opcode;
+				code[code_size].dst_index = dst_index;
+				code[code_size].src_index = src_index;
+				code[code_size].C = 0;
+
+				if (opcode == ADD)
+				{
+					// ADD instruction is implemented as two 1-cycle instructions on a real CPU, so mark ALU as busy for the next cycle too
+					alu_busy[next_latency - op_latency[opcode] + 1][alu_index] = true;
+
+					// ADD instruction requires 4 more random bytes for 32-bit constant "C" in "a = a + b + C"
+					check_data(&data_index, sizeof(uint32_t), data, sizeof(data));
+					uint32_t t;
+					memcpy(&t, data + data_index, sizeof(uint32_t));
+					code[code_size].C = SWAP32LE(t);
+					data_index += sizeof(uint32_t);
+				}
+
+				++code_size;
+				if (code_size >= NUM_INSTRUCTIONS)
+				{
+					break;
+				}
+			}
+			else
+			{
+				++num_retries;
+			}
+		}
+
+		// ASIC has more execution resources and can extract as much parallelism from the code as possible
+		// We need to add a few more MUL and ROR instructions to achieve minimal required latency for ASIC
+		// Get this latency for at least 1 of the 4 registers
+		const int prev_code_size = code_size;
+		while ((asic_latency[0] < TOTAL_LATENCY) && (asic_latency[1] < TOTAL_LATENCY) && (asic_latency[2] < TOTAL_LATENCY) && (asic_latency[3] < TOTAL_LATENCY))
+		{
+			int min_idx = 0;
+			int max_idx = 0;
+			for (int i = 1; i < 4; ++i)
+			{
+				if (asic_latency[i] < asic_latency[min_idx]) min_idx = i;
+				if (asic_latency[i] > asic_latency[max_idx]) max_idx = i;
+			}
+
+			const uint8_t pattern[3] = { ROR, MUL, MUL };
+			const uint8_t opcode = pattern[(code_size - prev_code_size) % 3];
+			latency[min_idx] = latency[max_idx] + op_latency[opcode];
+			asic_latency[min_idx] = asic_latency[max_idx] + asic_op_latency[opcode];
+
+			code[code_size].opcode = opcode;
+			code[code_size].dst_index = min_idx;
+			code[code_size].src_index = max_idx;
+			code[code_size].C = 0;
+			++code_size;
+		}
+
+	// There is ~99.8% chance that code_size >= NUM_INSTRUCTIONS here, so second iteration is required rarely
+	}  while (code_size < NUM_INSTRUCTIONS);
+
+	// Add final instruction to stop the interpreter
+	code[code_size].opcode = RET;
+	code[code_size].dst_index = 0;
+	code[code_size].src_index = 0;
+	code[code_size].C = 0;
+
+	return code_size;
+}
+
+#endif

src/net/Network.cpp

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -154,12 +155,12 @@ void Network::onResultAccepted(IStrategy *strategy, Client *client, const Submit
     m_state.add(result, error);
 
     if (error) {
-        LOG_INFO(isColors() ? "\x1B[01;31mrejected\x1B[0m (%" PRId64 "/%" PRId64 ") diff \x1B[01;37m%u\x1B[0m \x1B[31m\"%s\"\x1B[0m \x1B[01;30m(%" PRIu64 " ms)"
+        LOG_INFO(isColors() ? "\x1B[1;31mrejected\x1B[0m (%" PRId64 "/%" PRId64 ") diff \x1B[1;37m%u\x1B[0m \x1B[31m\"%s\"\x1B[0m \x1B[1;30m(%" PRIu64 " ms)"
                             : "rejected (%" PRId64 "/%" PRId64 ") diff %u \"%s\" (%" PRIu64 " ms)",
                  m_state.accepted, m_state.rejected, result.diff, error, result.elapsed);
     }
     else {
-        LOG_INFO(isColors() ? "\x1B[01;32maccepted\x1B[0m (%" PRId64 "/%" PRId64 ") diff \x1B[01;37m%u\x1B[0m \x1B[01;30m(%" PRIu64 " ms)"
+        LOG_INFO(isColors() ? "\x1B[1;32maccepted\x1B[0m (%" PRId64 "/%" PRId64 ") diff \x1B[1;37m%u\x1B[0m \x1B[1;30m(%" PRIu64 " ms)"
                             : "accepted (%" PRId64 "/%" PRId64 ") diff %u (%" PRIu64 " ms)",
                  m_state.accepted, m_state.rejected, result.diff, result.elapsed);
     }
@@ -174,9 +175,20 @@ bool Network::isColors() const
 
 void Network::setJob(Client *client, const Job &job, bool donate)
 {
-    LOG_INFO(isColors() ? MAGENTA_BOLD("new job") " from " WHITE_BOLD("%s:%d") " diff " WHITE_BOLD("%d") " algo " WHITE_BOLD("%s")
+    if (job.height()) {
-                        : "new job from %s:%d diff %d algo %s",
+        LOG_INFO(isColors() ? MAGENTA_BOLD("new job") " from " WHITE_BOLD("%s:%d") " diff " WHITE_BOLD("%d") " algo " WHITE_BOLD("%s") " height " WHITE_BOLD("%" PRIu64)
-             client->host(), client->port(), job.diff(), job.algorithm().shortName());
+                            : "new job from %s:%d diff %d algo %s height %" PRIu64,
+                 client->host(), client->port(), job.diff(), job.algorithm().shortName(), job.height());
+    }
+    else {
+        LOG_INFO(isColors() ? MAGENTA_BOLD("new job") " from " WHITE_BOLD("%s:%d") " diff " WHITE_BOLD("%d") " algo " WHITE_BOLD("%s")
+                            : "new job from %s:%d diff %d algo %s",
+                 client->host(), client->port(), job.diff(), job.algorithm().shortName());
+    }
+
+    if (!donate && m_donate) {
+        m_donate->setAlgo(job.algorithm());
+    }
 
     m_state.diff = job.diff();
     Workers::setJob(job, donate);

src/net/Network.h

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -21,8 +22,8 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __NETWORK_H__
+#ifndef XMRIG_NETWORK_H
-#define __NETWORK_H__
+#define XMRIG_NETWORK_H
 
 
 #include <vector>
@@ -47,7 +48,7 @@ class Network : public IJobResultListener, public IStrategyListener
 {
 public:
   Network(xmrig::Controller *controller);
-  ~Network();
+  ~Network() override;
 
   void connect();
   void stop();
@@ -76,4 +77,4 @@ private:
 };
 
 
-#endif /* __NETWORK_H__ */
+#endif /* XMRIG_NETWORK_H */

src/net/strategies/DonateStrategy.cpp

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -43,7 +44,9 @@ DonateStrategy::DonateStrategy(int level, const char *user, xmrig::Algo algo, IS
     m_donateTime(level * 60 * 1000),
     m_idleTime((100 - level) * 60 * 1000),
     m_strategy(nullptr),
-    m_listener(listener)
+    m_listener(listener),
+    m_now(0),
+    m_stop(0)
 {
     static char donate_user[96] = "44qJYxdbuqSKarYnDSXB6KLbsH4yR65vpJe3ELLDii9i4ZgKpgQXZYR4AMJxBJbfbKZGWUxZU42QyZSsP4AyZZMbJBCrWr1";
 
@@ -89,6 +92,12 @@ void DonateStrategy::connect()
 }
 
 
+void DonateStrategy::setAlgo(const xmrig::Algorithm &algo)
+{
+    m_strategy->setAlgo(algo);
+}
+
+
 void DonateStrategy::stop()
 {
     uv_timer_stop(&m_timer);
@@ -98,7 +107,14 @@ void DonateStrategy::stop()
 
 void DonateStrategy::tick(uint64_t now)
 {
+    m_now = now;
+
     m_strategy->tick(now);
+
+    if (m_stop && now > m_stop) {
+        m_strategy->stop();
+        m_stop = 0;
+    }
 }
 
 
@@ -115,7 +131,9 @@ void DonateStrategy::onActive(IStrategy *strategy, Client *client)
 
 void DonateStrategy::onJob(IStrategy *strategy, Client *client, const Job &job)
 {
-    m_listener->onJob(this, client, job);
+    if (isActive()) {
+        m_listener->onJob(this, client, job);
+    }
 }
 
 
@@ -138,7 +156,11 @@ void DonateStrategy::idle(uint64_t timeout)
 
 void DonateStrategy::suspend()
 {
-    m_strategy->stop();
+#   if defined(XMRIG_AMD_PROJECT) || defined(XMRIG_NVIDIA_PROJECT)
+    m_stop = m_now + 5000;
+#   else
+    m_stop = m_now + 500;
+#   endif
 
     m_active = false;
     m_listener->onPause(this);

src/net/strategies/DonateStrategy.h

@@ -5,7 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2016-2018 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -44,7 +45,7 @@ class DonateStrategy : public IStrategy, public IStrategyListener
 {
 public:
     DonateStrategy(int level, const char *user, xmrig::Algo algo, IStrategyListener *listener);
-    ~DonateStrategy();
+    ~DonateStrategy() override;
 
 public:
     inline bool isActive() const override  { return m_active; }
@@ -52,6 +53,7 @@ public:
 
     int64_t submit(const JobResult &result) override;
     void connect() override;
+    void setAlgo(const xmrig::Algorithm &algo) override;
     void stop() override;
     void tick(uint64_t now) override;
 
@@ -68,11 +70,13 @@ private:
     static void onTimer(uv_timer_t *handle);
 
     bool m_active;
-    const int m_donateTime;
+    const uint64_t m_donateTime;
-    const int m_idleTime;
+    const uint64_t m_idleTime;
     IStrategy *m_strategy;
     IStrategyListener *m_listener;
     std::vector<Pool> m_pools;
+    uint64_t m_now;
+    uint64_t m_stop;
     uv_timer_t m_timer;
 };
 

src/version.h

@@ -28,14 +28,14 @@
 #define APP_ID        "xmrig"
 #define APP_NAME      "XMRig"
 #define APP_DESC      "XMRig CPU miner"
-#define APP_VERSION   "2.10.0-mo1"
+#define APP_VERSION   "2.12.0-mo1"
 #define APP_DOMAIN    "xmrig.com"
 #define APP_SITE      "www.xmrig.com"
 #define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
 #define APP_KIND      "cpu"
 
 #define APP_VER_MAJOR  2
-#define APP_VER_MINOR  10
+#define APP_VER_MINOR  12
 #define APP_VER_PATCH  0
 
 #ifdef _MSC_VER

src/workers/CpuThread.cpp

@@ -145,16 +145,50 @@ bool xmrig::CpuThread::isSoftAES(AlgoVariant av)
 }
 
 
+#ifndef XMRIG_NO_ASM
+template<xmrig::Algo algo, xmrig::Variant variant>
+static inline void add_asm_func(xmrig::CpuThread::cn_hash_fun(&asm_func_map)[xmrig::ALGO_MAX][xmrig::AV_MAX][xmrig::VARIANT_MAX][xmrig::ASM_MAX])
+{
+    asm_func_map[algo][xmrig::AV_SINGLE][variant][xmrig::ASM_INTEL] = cryptonight_single_hash_asm<algo, variant, xmrig::ASM_INTEL>;
+    asm_func_map[algo][xmrig::AV_SINGLE][variant][xmrig::ASM_RYZEN] = cryptonight_single_hash_asm<algo, variant, xmrig::ASM_RYZEN>;
+    asm_func_map[algo][xmrig::AV_SINGLE][variant][xmrig::ASM_BULLDOZER] = cryptonight_single_hash_asm<algo, variant, xmrig::ASM_BULLDOZER>;
+
+    asm_func_map[algo][xmrig::AV_DOUBLE][variant][xmrig::ASM_INTEL] = cryptonight_double_hash_asm<algo, variant, xmrig::ASM_INTEL>;
+    asm_func_map[algo][xmrig::AV_DOUBLE][variant][xmrig::ASM_RYZEN] = cryptonight_double_hash_asm<algo, variant, xmrig::ASM_RYZEN>;
+    asm_func_map[algo][xmrig::AV_DOUBLE][variant][xmrig::ASM_BULLDOZER] = cryptonight_double_hash_asm<algo, variant, xmrig::ASM_BULLDOZER>;
+}
+#endif
+
 xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant av, Variant variant, Assembly assembly)
 {
     assert(variant >= VARIANT_0 && variant < VARIANT_MAX);
 
 #   ifndef XMRIG_NO_ASM
-    constexpr const size_t count = VARIANT_MAX * 10 * CRYPTONIGHT_MAX + 12;
+    if (assembly == ASM_AUTO) {
-#   else
+        assembly = Cpu::info()->assembly();
-    constexpr const size_t count = VARIANT_MAX * 10 * CRYPTONIGHT_MAX;
+    }
+
+    static cn_hash_fun asm_func_map[ALGO_MAX][AV_MAX][VARIANT_MAX][ASM_MAX] = {};
+    static bool asm_func_map_initialized = false;
+
+    if (!asm_func_map_initialized) {
+        add_asm_func<CRYPTONIGHT, VARIANT_2>(asm_func_map);
+        add_asm_func<CRYPTONIGHT, VARIANT_HALF>(asm_func_map);
+        add_asm_func<CRYPTONIGHT, VARIANT_WOW>(asm_func_map);
+
+        add_asm_func<CRYPTONIGHT_PICO, VARIANT_HALF>(asm_func_map);
+
+        asm_func_map_initialized = true;
+    }
+
+    cn_hash_fun fun = asm_func_map[algorithm][av][variant][assembly];
+    if (fun) {
+        return fun;
+    }
 #   endif
 
+    constexpr const size_t count = VARIANT_MAX * 10 * ALGO_MAX;
+
     static const cn_hash_fun func_table[] = {
         cryptonight_single_hash<CRYPTONIGHT, false, VARIANT_0>,
         cryptonight_double_hash<CRYPTONIGHT, false, VARIANT_0>,
@@ -250,6 +284,32 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
 
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
 
+#       ifndef XMRIG_NO_CN_GPU
+        cryptonight_single_hash_gpu<CRYPTONIGHT, false, VARIANT_GPU>,
+        nullptr,
+        cryptonight_single_hash_gpu<CRYPTONIGHT, true,  VARIANT_GPU>,
+        nullptr,
+        nullptr,
+        nullptr,
+        nullptr,
+        nullptr,
+        nullptr,
+        nullptr,
+#       else
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+#       endif
+
+        cryptonight_single_hash<CRYPTONIGHT, false, VARIANT_WOW>,
+        cryptonight_double_hash<CRYPTONIGHT, false, VARIANT_WOW>,
+        cryptonight_single_hash<CRYPTONIGHT, true,  VARIANT_WOW>,
+        cryptonight_double_hash<CRYPTONIGHT, true,  VARIANT_WOW>,
+        cryptonight_triple_hash<CRYPTONIGHT, false, VARIANT_WOW>,
+        cryptonight_quad_hash<CRYPTONIGHT,   false, VARIANT_WOW>,
+        cryptonight_penta_hash<CRYPTONIGHT,  false, VARIANT_WOW>,
+        cryptonight_triple_hash<CRYPTONIGHT, true,  VARIANT_WOW>,
+        cryptonight_quad_hash<CRYPTONIGHT,   true,  VARIANT_WOW>,
+        cryptonight_penta_hash<CRYPTONIGHT,  true,  VARIANT_WOW>,
+
 #       ifndef XMRIG_NO_AEON
         cryptonight_single_hash<CRYPTONIGHT_LITE, false, VARIANT_0>,
         cryptonight_double_hash<CRYPTONIGHT_LITE, false, VARIANT_0>,
@@ -282,6 +342,8 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_2
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_HALF
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
 #       else
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_0
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_1
@@ -294,6 +356,8 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_2
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_HALF
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
 #       endif
 
 #       ifndef XMRIG_NO_SUMO
@@ -340,6 +404,8 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_2
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_HALF
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
 #       else
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_0
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_1
@@ -352,7 +418,10 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_2
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_HALF
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
 #       endif
+
 #       ifndef XMRIG_NO_CN_PICO
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_0
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_1
@@ -375,6 +444,9 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         cryptonight_triple_hash<CRYPTONIGHT_PICO, true,  VARIANT_TRTL>,
         cryptonight_quad_hash<CRYPTONIGHT_PICO,   true,  VARIANT_TRTL>,
         cryptonight_penta_hash<CRYPTONIGHT_PICO,  true,  VARIANT_TRTL>,
+
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
 #       else
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_0
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_1
@@ -387,30 +459,16 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_2
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_HALF
         nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_TRTL
-#       endif
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_GPU
-#       ifndef XMRIG_NO_ASM
+        nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, // VARIANT_WOW
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_2, ASM_INTEL>,
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_2, ASM_RYZEN>,
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_2, ASM_BULLDOZER>,
-        cryptonight_double_hash_asm<CRYPTONIGHT, VARIANT_2, ASM_INTEL>,
-
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_HALF, ASM_INTEL>,
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_HALF, ASM_RYZEN>,
-        cryptonight_single_hash_asm<CRYPTONIGHT, VARIANT_HALF, ASM_BULLDOZER>,
-        cryptonight_double_hash_asm<CRYPTONIGHT, VARIANT_HALF, ASM_INTEL>,
-
-        cryptonight_single_hash_asm<CRYPTONIGHT_PICO, VARIANT_TRTL, ASM_INTEL>,
-        cryptonight_single_hash_asm<CRYPTONIGHT_PICO, VARIANT_TRTL, ASM_RYZEN>,
-        cryptonight_single_hash_asm<CRYPTONIGHT_PICO, VARIANT_TRTL, ASM_BULLDOZER>,
-        cryptonight_double_hash_asm<CRYPTONIGHT_PICO, VARIANT_TRTL, ASM_INTEL>
 #       endif
     };
 
-
     static_assert(count == sizeof(func_table) / sizeof(func_table[0]), "func_table size mismatch");
 
+    const size_t index = VARIANT_MAX * 10 * algorithm + 10 * variant + av - 1;
+
 #   ifndef NDEBUG
-    const size_t index = fnIndex(algorithm, av, variant, assembly);
     cn_hash_fun func = func_table[index];
 
     assert(index < sizeof(func_table) / sizeof(func_table[0]));
@@ -418,7 +476,7 @@ xmrig::CpuThread::cn_hash_fun xmrig::CpuThread::fn(Algo algorithm, AlgoVariant a
 
     return func;
 #   else
-    return func_table[fnIndex(algorithm, av, variant, assembly)];
+    return func_table[index];
 #   endif
 }
 
@@ -580,49 +638,3 @@ rapidjson::Value xmrig::CpuThread::toConfig(rapidjson::Document &doc) const
 
     return obj;
 }
-
-
-size_t xmrig::CpuThread::fnIndex(Algo algorithm, AlgoVariant av, Variant variant, Assembly assembly)
-{
-    const size_t index = VARIANT_MAX * 10 * algorithm + 10 * variant + av - 1;
-
-#   ifndef XMRIG_NO_ASM
-    if (assembly == ASM_AUTO) {
-        assembly = Cpu::info()->assembly();
-    }
-
-    if (assembly == ASM_NONE) {
-        return index;
-    }
-
-    constexpr const size_t offset = VARIANT_MAX * 10 * CRYPTONIGHT_MAX;
-    size_t extra_offset           = 0;
-
-    if (algorithm == CRYPTONIGHT && (variant == VARIANT_2 || variant == VARIANT_HALF)) {
-        if (variant == VARIANT_HALF) {
-            extra_offset += 4;
-        }
-
-        if (av == AV_SINGLE) {
-            return offset + extra_offset + assembly - 2;
-        }
-
-        if (av == AV_DOUBLE) {
-            return offset + 3 + extra_offset;
-        }
-    }
-    else if (algorithm == CRYPTONIGHT_PICO && variant == VARIANT_TRTL) {
-        extra_offset = 8;
-
-        if (av == AV_SINGLE) {
-            return offset + extra_offset + assembly - 2;
-        }
-
-        if (av == AV_DOUBLE) {
-            return offset + 3 + extra_offset;
-        }
-    }
-#   endif
-
-    return index;
-}

src/workers/CpuThread.h

@@ -60,7 +60,7 @@ public:
 
     CpuThread(size_t index, Algo algorithm, AlgoVariant av, Multiway multiway, int64_t affinity, int priority, bool softAES, bool prefetch, Assembly assembly);
 
-    typedef void (*cn_hash_fun)(const uint8_t *input, size_t size, uint8_t *output, cryptonight_ctx **ctx);
+    typedef void (*cn_hash_fun)(const uint8_t *input, size_t size, uint8_t *output, cryptonight_ctx **ctx, uint64_t height);
     typedef void (*cn_mainloop_fun)(cryptonight_ctx *ctx);
     typedef void (*cn_mainloop_double_fun)(cryptonight_ctx *ctx1, cryptonight_ctx *ctx2);
 
@@ -98,8 +98,6 @@ protected:
     rapidjson::Value toConfig(rapidjson::Document &doc) const override;
 
 private:
-    static size_t fnIndex(Algo algorithm, AlgoVariant av, Variant variant, Assembly assembly);
-
     const Algo m_algorithm;
     const AlgoVariant m_av;
     const Assembly m_assembly;

src/workers/MultiWorker.cpp

@@ -25,9 +25,11 @@
 
 
 #include <thread>
+#include <sstream>
 
 
 #include "crypto/CryptoNight_test.h"
+#include "common/log/Log.h"
 #include "workers/CpuThread.h"
 #include "workers/MultiWorker.h"
 #include "workers/Workers.h"
@@ -54,14 +56,29 @@ bool MultiWorker<N>::selfTest()
     using namespace xmrig;
 
     if (m_thread->algorithm() == CRYPTONIGHT) {
-        return verify(VARIANT_0,    test_output_v0)  &&
+        if (!verify2(VARIANT_WOW, test_input_WOW)) {
-               verify(VARIANT_1,    test_output_v1)  &&
+            LOG_WARN("CryptonightR (Wownero) self-test failed");
-               verify(VARIANT_2,    test_output_v2)  &&
+            return false;
-               verify(VARIANT_XTL,  test_output_xtl) &&
+        }
-               verify(VARIANT_MSR,  test_output_msr) &&
+
-               verify(VARIANT_XAO,  test_output_xao) &&
+        const bool rc = verify(VARIANT_0,    test_output_v0)  &&
-               verify(VARIANT_RTO,  test_output_rto) &&
+                        verify(VARIANT_1,    test_output_v1)  &&
-               verify(VARIANT_HALF, test_output_half);
+                        verify(VARIANT_2,    test_output_v2)  &&
+                        verify(VARIANT_XTL,  test_output_xtl) &&
+                        verify(VARIANT_MSR,  test_output_msr) &&
+                        verify(VARIANT_XAO,  test_output_xao) &&
+                        verify(VARIANT_RTO,  test_output_rto) &&
+                        verify(VARIANT_HALF, test_output_half);
+
+#       ifndef XMRIG_NO_CN_GPU
+        if (!rc || N > 1) {
+            return rc;
+        }
+
+        return verify(VARIANT_GPU, test_output_gpu);
+#       else
+        return rc;
+#       endif
     }
 
 #   ifndef XMRIG_NO_AEON
@@ -111,7 +128,7 @@ void MultiWorker<N>::start()
                 storeStats();
             }
 
-            m_thread->fn(m_state.job.algorithm().variant())(m_state.blob, m_state.job.size(), m_hash, m_ctx);
+            m_thread->fn(m_state.job.algorithm().variant())(m_state.blob, m_state.job.size(), m_hash, m_ctx, m_state.job.height());
 
             for (size_t i = 0; i < N; ++i) {
                 if (*reinterpret_cast<uint64_t*>(m_hash + (i * 32) + 24) < m_state.job.target()) {
@@ -152,11 +169,71 @@ bool MultiWorker<N>::verify(xmrig::Variant variant, const uint8_t *referenceValu
         return false;
     }
 
-    func(test_input, 76, m_hash, m_ctx);
+    func(test_input, 76, m_hash, m_ctx, 0);
     return memcmp(m_hash, referenceValue, sizeof m_hash) == 0;
 }
 
 
+template<size_t N>
+bool MultiWorker<N>::verify2(xmrig::Variant variant, const char *test_data)
+{
+    xmrig::CpuThread::cn_hash_fun func = m_thread->fn(variant);
+    if (!func) {
+        return false;
+    }
+
+    std::stringstream s(test_data);
+    std::string expected_hex;
+    std::string input_hex;
+    uint64_t height;
+    while (!s.eof())
+    {
+        uint8_t referenceValue[N * 32];
+        uint8_t input[N * 256];
+
+        s >> expected_hex;
+        s >> input_hex;
+        s >> height;
+
+        if ((expected_hex.length() != 64) || (input_hex.length() > 512))
+        {
+            return false;
+        }
+
+        bool err = false;
+
+        for (int i = 0; i < 32; ++i)
+        {
+            referenceValue[i] = (hf_hex2bin(expected_hex[i * 2], err) << 4) + hf_hex2bin(expected_hex[i * 2 + 1], err);
+        }
+
+        const size_t input_len = input_hex.length() / 2;
+        for (size_t i = 0; i < input_len; ++i)
+        {
+            input[i] = (hf_hex2bin(input_hex[i * 2], err) << 4) + hf_hex2bin(input_hex[i * 2 + 1], err);
+        }
+
+        if (err)
+        {
+            return false;
+        }
+
+        for (size_t i = 1; i < N; ++i)
+        {
+            memcpy(input + i * input_len, input, input_len);
+            memcpy(referenceValue + i * 32, referenceValue, 32);
+        }
+
+        func(input, input_len, m_hash, m_ctx, height);
+        if (memcmp(m_hash, referenceValue, sizeof m_hash) != 0)
+        {
+            return false;
+        }
+    }
+    return true;
+}
+
+
 template<size_t N>
 void MultiWorker<N>::consumeJob()
 {

src/workers/MultiWorker.h

@@ -50,6 +50,7 @@ protected:
 private:
     bool resume(const Job &job);
     bool verify(xmrig::Variant variant, const uint8_t *referenceValue);
+    bool verify2(xmrig::Variant variant, const char *test_data);
     void consumeJob();
     void save(const Job &job);