Fixed errors found by static analysis
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parent
1c9e959cc4
commit
cafd868773
10 changed files with 16 additions and 28 deletions
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@ -173,7 +173,7 @@ void sort_indices(int N, const uint8_t* v, uint64_t* indices, uint64_t* tmp_indi
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bool xmrig::astrobwt::astrobwt_dero(const void* input_data, uint32_t input_size, void* scratchpad, uint8_t* output_hash, int stage2_max_size, bool avx2)
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{
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uint8_t key[32];
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alignas(8) uint8_t key[32];
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uint8_t* scratchpad_ptr = (uint8_t*)(scratchpad) + 64;
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uint8_t* stage1_output = scratchpad_ptr;
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uint8_t* stage2_output = scratchpad_ptr;
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@ -76,7 +76,7 @@ static inline void add_random_math(uint8_t* &p, const V4_Instruction* code, int
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void_func begin = instructions[c];
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if ((ASM = xmrig::Assembly::BULLDOZER) && (inst.opcode == MUL) && !is_64_bit) {
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if ((ASM == xmrig::Assembly::BULLDOZER) && (inst.opcode == MUL) && !is_64_bit) {
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// AMD Bulldozer has latency 4 for 32-bit IMUL and 6 for 64-bit IMUL
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// Always use 32-bit IMUL for AMD Bulldozer in 32-bit mode - skip prefix 0x48 and change 0x49 to 0x41
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uint8_t* prefix = reinterpret_cast<uint8_t*>(begin);
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@ -411,30 +411,14 @@ namespace randomx {
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emitByte(instr.getImm32() & 63, code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IADD_C7:
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emit(REX_81, code, codePos);
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emitByte(0xc0 + instr.dst, code, codePos);
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emit32(instr.getImm32(), code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IXOR_C7:
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emit(REX_XOR_RI, code, codePos);
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emitByte(0xf0 + instr.dst, code, codePos);
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emit32(instr.getImm32(), code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IADD_C8:
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emit(REX_81, code, codePos);
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emitByte(0xc0 + instr.dst, code, codePos);
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emit32(instr.getImm32(), code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IXOR_C8:
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emit(REX_XOR_RI, code, codePos);
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emitByte(0xf0 + instr.dst, code, codePos);
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emit32(instr.getImm32(), code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IADD_C9:
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emit(REX_81, code, codePos);
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emitByte(0xc0 + instr.dst, code, codePos);
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emit32(instr.getImm32(), code, codePos);
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break;
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case randomx::SuperscalarInstructionType::IXOR_C7:
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case randomx::SuperscalarInstructionType::IXOR_C8:
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case randomx::SuperscalarInstructionType::IXOR_C9:
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emit(REX_XOR_RI, code, codePos);
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emitByte(0xf0 + instr.dst, code, codePos);
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@ -1088,7 +1072,7 @@ namespace randomx {
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pos += 14;
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if (jmp_offset >= -128) {
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*(uint32_t*)(p + pos) = 0x74 + (jmp_offset << 8);
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*(uint32_t*)(p + pos) = 0x74 + (static_cast<uint32_t>(jmp_offset) << 8);
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pos += 2;
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}
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else {
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@ -196,7 +196,7 @@ namespace randomx {
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int latency_;
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int resultOp_ = 0;
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int dstOp_ = 0;
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int srcOp_;
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int srcOp_ = 0;
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SuperscalarInstructionInfo(const char* name)
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: name_(name), type_(SuperscalarInstructionType::INVALID), latency_(0) {}
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