Added MSVC support for Argon2.

src/3rdparty/argon2/arch/x86_64/lib/argon2-avx2.c

@@ -3,7 +3,11 @@
 #ifdef HAVE_AVX2
 #include <string.h>
 
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "cpu-flags.h"
 

src/3rdparty/argon2/arch/x86_64/lib/argon2-avx512f.c

@@ -4,7 +4,11 @@
 #include <stdint.h>
 #include <string.h>
 
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "cpu-flags.h"
 

src/3rdparty/argon2/arch/x86_64/lib/argon2-sse2.c

@@ -1,7 +1,11 @@
 #include "argon2-sse2.h"
 
 #ifdef HAVE_SSE2
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "cpu-flags.h"
 

src/3rdparty/argon2/arch/x86_64/lib/argon2-ssse3.c

@@ -3,7 +3,11 @@
 #ifdef HAVE_SSSE3
 #include <string.h>
 
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "cpu-flags.h"
 

src/3rdparty/argon2/arch/x86_64/lib/argon2-template-128.h

@@ -1,6 +1,10 @@
 #include <string.h>
 
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "core.h"
 

src/3rdparty/argon2/arch/x86_64/lib/argon2-xop.c

@@ -3,7 +3,11 @@
 #ifdef HAVE_XOP
 #include <string.h>
 
-#include <x86intrin.h>
+#ifdef __GNUC__
+#   include <x86intrin.h>
+#else
+#   include <intrin.h>
+#endif
 
 #include "cpu-flags.h"
 

src/3rdparty/argon2/arch/x86_64/lib/cpu-flags.c

@@ -1,6 +1,49 @@
+#include <stdbool.h>
+#include <stdint.h>
+
+
 #include "cpu-flags.h"
 
-#include <cpuid.h>
+#include <stdio.h>
+
+#ifdef _MSC_VER
+#   include <intrin.h>
+#else
+#   include <cpuid.h>
+#endif
+
+#ifndef bit_OSXSAVE
+#   define bit_OSXSAVE (1 << 27)
+#endif
+
+#ifndef bit_SSE2
+#   define bit_SSE2 (1 << 26)
+#endif
+
+#ifndef bit_SSSE3
+#   define bit_SSSE3 (1 << 9)
+#endif
+
+#ifndef bit_AVX2
+#   define bit_AVX2 (1 << 5)
+#endif
+
+#ifndef bit_AVX512F
+#   define bit_AVX512F (1 << 16)
+#endif
+
+#ifndef bit_XOP
+#   define bit_XOP (1 << 11)
+#endif
+
+#define PROCESSOR_INFO    (1)
+#define EXTENDED_FEATURES (7)
+
+#define EAX_Reg  (0)
+#define EBX_Reg  (1)
+#define ECX_Reg  (2)
+#define EDX_Reg  (3)
+
 
 enum {
     X86_64_FEATURE_SSE2     = (1 << 0),
@@ -12,56 +55,51 @@ enum {
 
 static unsigned int cpu_flags;
 
-static unsigned int get_cpuid(int ext, unsigned int level, unsigned int *ebx,
-                              unsigned int *ecx, unsigned int *edx)
+
+static inline void cpuid(uint32_t level, int32_t output[4])
 {
-    unsigned int eax;
-    __cpuid(ext ? (0x80000000 | level) : level,
-            eax, *ebx, *ecx, *edx);
-    return eax;
+#   ifdef _MSC_VER
+    __cpuid(output, (int) level);
+#   else
+    __cpuid_count(level, 0, output[0], output[1], output[2], output[3]);
+#   endif
 }
 
-static unsigned int get_cpuid_count(int ext, unsigned int level,
-                                    unsigned int count, unsigned int *ebx,
-                                    unsigned int *ecx, unsigned int *edx)
+
+static bool has_feature(uint32_t level, uint32_t reg, int32_t bit)
 {
-    unsigned int eax;
-    __cpuid_count(ext ? (0x80000000 | level) : level,
-                  count, eax, *ebx, *ecx, *edx);
-    return 1;
+    int32_t cpu_info[4] = { 0 };
+    cpuid(level, cpu_info);
+
+    return (cpu_info[reg] & bit) != 0;
 }
 
+
 void cpu_flags_get(void)
 {
-    unsigned int ebx, ecx, edx;
-    unsigned int level, level_ext;
+    if (has_feature(PROCESSOR_INFO, EDX_Reg, bit_SSE2)) {
+        cpu_flags |= X86_64_FEATURE_SSE2;
+    }
 
-    cpu_flags = 0;
-    level     = get_cpuid(0, 0, &ebx, &ecx, &edx);
-    level_ext = get_cpuid(1, 0, &ebx, &ecx, &edx);
+    if (has_feature(PROCESSOR_INFO, ECX_Reg, bit_SSSE3)) {
+        cpu_flags |= X86_64_FEATURE_SSSE3;
+    }
 
-    if (level >= 1 && get_cpuid(0, 1, &ebx, &ecx, &edx)) {
-        if (edx & (1 << 26)) {
-            cpu_flags |= X86_64_FEATURE_SSE2;
-        }
-        if (ecx & (1 << 9)) {
-            cpu_flags |= X86_64_FEATURE_SSSE3;
-        }
+    if (!has_feature(PROCESSOR_INFO, ECX_Reg, bit_OSXSAVE)) {
+        return;
     }
-    if (level >= 7 && get_cpuid_count(0, 7, 0, &ebx, &ecx, &edx)) {
-        if (ebx & (1 << 5)) {
-            cpu_flags |= X86_64_FEATURE_AVX2;
-        }
-        if (ebx & (1 << 16)) {
-            cpu_flags |= X86_64_FEATURE_AVX512F;
-        }
+
+    if (has_feature(EXTENDED_FEATURES, EBX_Reg, bit_AVX2)) {
+        cpu_flags |= X86_64_FEATURE_AVX2;
     }
-    if (level_ext >= 1 && get_cpuid(1, 1, &ebx, &ecx, &edx)) {
-        if (ecx & (1 << 11)) {
-            cpu_flags |= X86_64_FEATURE_XOP;
-        }
+
+    if (has_feature(EXTENDED_FEATURES, EBX_Reg, bit_AVX512F)) {
+        cpu_flags |= X86_64_FEATURE_AVX512F;
+    }
+
+    if (has_feature(0x80000001, ECX_Reg, bit_XOP)) {
+        cpu_flags |= X86_64_FEATURE_XOP;
     }
-    /* FIXME: check also OS support! */
 }
 
 int cpu_flags_have_sse2(void)