SChernykh
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72c385c870
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Cache QoS: fix for seting MSR
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2020-07-13 20:30:44 +02:00 |
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SChernykh
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c83429c55c
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RandomX: added cache QoS support
False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
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2020-07-13 17:23:18 +02:00 |
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SChernykh
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59313d9cc3
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Print error message when MSR mod fails
Make sure user knows that hashrate is worse than it could be.
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2020-06-26 19:54:06 +02:00 |
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XMRig
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7a3233ab4b
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Use long tags.
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2020-05-28 20:32:41 +07:00 |
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XMRig
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030d6e5962
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Update year.
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2020-02-01 20:24:00 +07:00 |
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SChernykh
|
665e43fecc
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MSR preset for Bulldozer CPUs
Also fixed verbose output for MSR presets with masks.
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2020-01-14 19:27:34 +01:00 |
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SChernykh
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c9f90e6770
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Refactor Ryzen fix to fix compilation issues
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2019-12-31 11:55:07 +02:00 |
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XMRig
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f00769f758
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Code style cleanup.
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2019-12-28 01:45:54 +07:00 |
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SChernykh
|
3a2941b719
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Fix for 1st-gen Ryzen crashes
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2019-12-27 12:40:38 +02:00 |
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XMRig
|
12fb27e2cf
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Use MsrItem::kNoMask.
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2019-12-19 03:20:48 +07:00 |
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SChernykh
|
59e8fdb9ed
|
Added bit masks for MSR registers
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2019-12-17 23:55:22 +01:00 |
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XMRig
|
f8865b1498
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Added "verbose" option.
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2019-12-17 21:46:11 +07:00 |
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XMRig
|
a877b1d269
|
Added save/restore MSR registers on Linux.
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2019-12-17 16:17:11 +07:00 |
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XMRig
|
8bef964f68
|
Added support for write custom MSR.
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2019-12-17 02:27:07 +07:00 |
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XMRig
|
5d0fd2dc8e
|
Unified Linux/Windows MSR log messages.
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2019-12-15 01:32:41 +07:00 |
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XMRig
|
7ff465053b
|
Added additional MSR registers for Ryzen CPUs.
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2019-12-12 14:21:15 +07:00 |
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XMRig
|
96ee721d21
|
Fixed MSR.
|
2019-12-11 20:09:25 +07:00 |
|
XMRig
|
de7ed2b968
|
Added support for AMD specific MSR registers.
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2019-12-11 19:37:13 +07:00 |
|
XMRig
|
96cfdda9a1
|
Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N.
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2019-12-10 23:57:29 +07:00 |
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