SChernykh
e8a99809b6
Fixed crash when GPU mining cn-heavy on Zen3 system
2021-02-18 14:49:37 +01:00
SChernykh
dc1443f3b8
Cryptonight: add prefetching to interleaved mode
2021-02-07 23:29:54 +01:00
SChernykh
8af8df25aa
Optimized cn-heavy for Zen3
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- Uses scratchpad interleaving to access only the closest L3 slice from each CPU core.
- Also activates MSR mod for cn-heavy because CPU prefetchers get confused with interleaving
- 7-8% speedup on Zen3
2021-02-07 22:05:11 +01:00
SChernykh
21abbe4e84
Fix compile error in Termux
2021-02-03 19:05:05 +01:00
XMRig
2c8d8ee2ab
Fixed macOS build and compile warning.
2021-02-02 13:53:45 +07:00
SChernykh
346892e170
Update jit_compiler_a64.cpp
2021-02-01 22:52:02 +01:00
SChernykh
db03573804
ARM JIT: added missing cache flush
2021-02-01 22:42:35 +01:00
SChernykh
e74573f81f
Fixed code allocation for ARM
2021-02-01 22:36:11 +01:00
xmrig
0e70974d7d
Merge pull request #2076 from xmrig/feature-flexible-hugepages
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Added support for flexible huge page sizes on Linux.
2021-02-02 04:07:41 +07:00
SChernykh
4108428872
Fixed crashes on ARM
2021-02-01 17:07:45 +01:00
XMRig
09624c4f9b
Added support for flexible huge page sizes on Linux.
2021-01-31 23:38:57 +07:00
xmrig
5999dccd57
Merge pull request #2058 from SChernykh/dev
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RandomX JIT x86: remove unnecessary instructions
2021-01-24 13:59:56 +07:00
SChernykh
78922a0772
RandomX JIT x86: remove unnecessary instructions
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Adopted from https://github.com/tevador/RandomX/pull/201
2021-01-23 22:28:50 +01:00
XMRig
672f6df6c1
Fixed Cache QoS restore on exit where it not supported.
2021-01-24 02:23:27 +07:00
XMRig
9dae559b73
Added RxMsr class.
2021-01-23 23:23:39 +07:00
XMRig
b9d813c403
Move Ryzen related fixes to RxFix class.
2021-01-23 00:27:56 +07:00
XMRig
c48e2e6af8
Added new class Msr.
2021-01-22 23:50:25 +07:00
XMRig
3730bcd434
Merge branch 'master' into feature-msr2
2021-01-22 16:55:57 +07:00
XMRig
ea367da064
#2043 Fix compile warning.
2021-01-17 17:48:35 +07:00
Richard Mitsuk Lavitt
590252bd5e
fixed grammar in a couple of awkward error messages
2021-01-15 14:33:38 -06:00
SChernykh
f62f4e6108
RandomX x86 JIT: remove redundant CFROUND
2021-01-07 16:20:00 +01:00
SChernykh
ac46d6f8de
Fix GCC warning
2020-12-19 19:50:52 +01:00
SChernykh
5efd00abec
Another dataset AVX2 init speedup (+3.8% faster on Zen3)
2020-12-19 19:46:31 +01:00
SChernykh
633aaccd9c
Added config option for AVX2 dataset init
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-1 = Auto detect
0 = Always disabled
1 = Enabled if AVX2 is supported
2020-12-19 16:18:49 +01:00
SChernykh
410313d933
Auto-detect the fastest code for dataset init
2020-12-19 13:59:28 +01:00
SChernykh
515a85e66c
Dataset initialization with AVX2 (WIP)
2020-12-18 14:53:54 +01:00
XMRig
6b21a51a2f
Huge pages not supported by macOS ARM.
2020-12-16 01:59:20 +07:00
XMRig
6b331b6945
Reduce JIT memory for ARM.
2020-12-15 02:52:38 +07:00
SChernykh
414588d701
Fix alignment for Linux
2020-12-14 18:32:25 +01:00
SChernykh
f89f6a8abf
Fix: secure JIT and huge pages are incompatible on Windows
2020-12-14 18:22:58 +01:00
XMRig
87fafcf91b
Fixed JIT on macOS.
2020-12-12 22:40:48 +07:00
XMRig
2966b80ba1
Fixed macOS build.
2020-12-12 22:15:15 +07:00
XMRig
179f09081f
Alternative secure JIT for macOS.
2020-12-12 21:32:36 +07:00
XMRig
775867fc3e
Fixed secure JIT on Linux and code cleanup.
2020-12-12 19:18:47 +07:00
XMRig
497863441a
Remove duplicated code.
2020-12-12 12:39:11 +07:00
XMRig
ec62ded279
Added generic secure JIT support for RandomX.
2020-12-11 23:17:54 +07:00
SChernykh
0da3390d09
More static analysis fixes
2020-12-08 16:05:58 +01:00
SChernykh
cafd868773
Fixed errors found by static analysis
2020-12-08 12:16:59 +01:00
XMRig
c8ee6f7db8
Move Profiler and more cleanup.
2020-12-04 09:23:40 +07:00
XMRig
63bd45c397
Added Cvt class.
2020-12-02 16:31:45 +07:00
SChernykh
d557fe7f39
Fix RandomX init when switching to other algo and back
2020-11-29 22:02:48 +01:00
SChernykh
f16d1837f8
Optimized JIT compiler
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More branch-free code
2020-11-29 14:05:50 +01:00
SChernykh
c10ec90b60
Make single thread bench cheat-resistant
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Each hash is dependent on the previous hash to make multi-threaded cheating impossible.
2020-11-15 20:38:27 +01:00
SChernykh
9a1e867da2
Fixed MSR mod names in JSON API
2020-11-14 19:55:43 +01:00
XMRig
3b6cfd9c4f
#1937 Print path to existing WinRing0 service without verbose option.
2020-11-12 23:32:49 +07:00
cohcho
eb36d2beef
MemoryPool: fix alignment modification
2020-11-10 16:49:10 +00:00
cohcho
a64ff6b7c7
CompiledVm: define default constructor
2020-11-09 16:29:42 +00:00
SChernykh
c8c0abdb00
Separate MSR mod for Zen/Zen2 and Zen3
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Another +0.5% speedup for Zen2
2020-11-08 19:40:44 +01:00
xmrig
5df1686810
Merge pull request #1932 from SChernykh/dev
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New MSR mod for Ryzen
2020-11-07 13:09:21 +07:00
SChernykh
1e3e8ff8ee
Update RxConfig.cpp
2020-11-06 22:59:18 +01:00