185 lines
6 KiB
C++
185 lines
6 KiB
C++
/*
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Copyright (c) 2018-2020, tevador <tevador@gmail.com>
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Copyright (c) 2019-2020, SChernykh <https://github.com/SChernykh>
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Copyright (c) 2019-2020, XMRig <https://github.com/xmrig>, <support@xmrig.com>
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the copyright holder nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#pragma once
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#include <cstdint>
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#include <cstring>
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#include <vector>
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#include "crypto/randomx/common.hpp"
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namespace randomx {
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class Program;
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struct ProgramConfiguration;
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class SuperscalarProgram;
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class JitCompilerX86;
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class Instruction;
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typedef void(*InstructionGeneratorX86)(JitCompilerX86*, const Instruction&);
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constexpr uint32_t CodeSize = 64 * 1024;
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class JitCompilerX86 {
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public:
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explicit JitCompilerX86(bool hugePagesEnable, bool optimizedInitDatasetEnable);
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~JitCompilerX86();
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void prepare();
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void generateProgram(Program&, ProgramConfiguration&, uint32_t);
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void generateProgramLight(Program&, ProgramConfiguration&, uint32_t);
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template<size_t N>
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void generateSuperscalarHash(SuperscalarProgram (&programs)[N]);
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void generateDatasetInitCode();
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inline ProgramFunc *getProgramFunc() const {
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# ifdef XMRIG_SECURE_JIT
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enableExecution();
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# endif
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return reinterpret_cast<ProgramFunc*>(code);
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}
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inline DatasetInitFunc *getDatasetInitFunc() const {
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# ifdef XMRIG_SECURE_JIT
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enableExecution();
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# endif
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return (DatasetInitFunc*)code;
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}
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uint8_t* getCode() {
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return code;
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}
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size_t getCodeSize();
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void enableWriting() const;
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void enableExecution() const;
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alignas(64) static InstructionGeneratorX86 engine[257];
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private:
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int registerUsage[RegistersCount] = {};
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uint8_t* code = nullptr;
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uint32_t codePos = 0;
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uint32_t codePosFirst = 0;
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uint32_t vm_flags = 0;
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int32_t prevCFROUND = -1;
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int32_t prevFPOperation = -1;
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# ifdef XMRIG_FIX_RYZEN
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std::pair<const void*, const void*> mainLoopBounds;
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# endif
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bool BranchesWithin32B = false;
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bool hasAVX;
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bool hasAVX2;
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bool initDatasetAVX2;
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bool hasXOP;
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uint8_t* allocatedCode = nullptr;
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size_t allocatedSize = 0;
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uint8_t* imul_rcp_storage = nullptr;
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uint32_t imul_rcp_storage_used = 0;
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void generateProgramPrologue(Program&, ProgramConfiguration&);
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void generateProgramEpilogue(Program&, ProgramConfiguration&);
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template<bool rax>
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static void genAddressReg(const Instruction&, const uint32_t src, uint8_t* code, uint32_t& codePos);
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static void genAddressRegDst(const Instruction&, uint8_t* code, uint32_t& codePos);
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static void genAddressImm(const Instruction&, uint8_t* code, uint32_t& codePos);
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static uint32_t genSIB(int scale, int index, int base) { return (scale << 6) | (index << 3) | base; }
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template<bool AVX2>
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void generateSuperscalarCode(Instruction& inst, uint8_t* code, uint32_t& codePos);
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static void emitByte(uint8_t val, uint8_t* code, uint32_t& codePos) {
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code[codePos] = val;
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++codePos;
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}
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static void emit32(uint32_t val, uint8_t* code, uint32_t& codePos) {
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memcpy(code + codePos, &val, sizeof val);
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codePos += sizeof val;
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}
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static void emit64(uint64_t val, uint8_t* code, uint32_t& codePos) {
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memcpy(code + codePos, &val, sizeof val);
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codePos += sizeof val;
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}
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template<size_t N>
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static void emit(const uint8_t (&src)[N], uint8_t* code, uint32_t& codePos) {
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emit(src, N, code, codePos);
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}
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static void emit(const uint8_t* src, size_t count, uint8_t* code, uint32_t& codePos) {
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memcpy(code + codePos, src, count);
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codePos += count;
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}
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public:
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void h_IADD_RS(const Instruction&);
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void h_IADD_M(const Instruction&);
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void h_ISUB_R(const Instruction&);
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void h_ISUB_M(const Instruction&);
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void h_IMUL_R(const Instruction&);
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void h_IMUL_M(const Instruction&);
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void h_IMULH_R(const Instruction&);
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void h_IMULH_R_BMI2(const Instruction&);
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void h_IMULH_M(const Instruction&);
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void h_IMULH_M_BMI2(const Instruction&);
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void h_ISMULH_R(const Instruction&);
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void h_ISMULH_M(const Instruction&);
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void h_IMUL_RCP(const Instruction&);
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void h_INEG_R(const Instruction&);
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void h_IXOR_R(const Instruction&);
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void h_IXOR_M(const Instruction&);
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void h_IROR_R(const Instruction&);
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void h_IROL_R(const Instruction&);
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void h_ISWAP_R(const Instruction&);
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void h_FSWAP_R(const Instruction&);
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void h_FADD_R(const Instruction&);
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void h_FADD_M(const Instruction&);
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void h_FSUB_R(const Instruction&);
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void h_FSUB_M(const Instruction&);
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void h_FSCAL_R(const Instruction&);
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void h_FMUL_R(const Instruction&);
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void h_FDIV_M(const Instruction&);
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void h_FSQRT_R(const Instruction&);
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template<bool jccErratum>
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void h_CBRANCH(const Instruction&);
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void h_CFROUND(const Instruction&);
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void h_CFROUND_BMI2(const Instruction&);
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void h_ISTORE(const Instruction&);
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void h_NOP(const Instruction&);
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};
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}
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