88 lines
No EOL
1.6 KiB
ArmAsm
88 lines
No EOL
1.6 KiB
ArmAsm
#define ALIGN .align
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.intel_syntax noprefix
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#ifdef __APPLE__
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# define FN_PREFIX(fn) _ ## fn
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.text
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#else
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# define FN_PREFIX(fn) fn
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.section .text
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#endif
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.global FN_PREFIX(cnv1_mainloop_sandybridge_asm)
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.global FN_PREFIX(cnv2_mainloop_ivybridge_asm)
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.global FN_PREFIX(cnv2_mainloop_ryzen_asm)
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.global FN_PREFIX(cnv2_double_mainloop_sandybridge_asm)
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.global FN_PREFIX(cnv1_mainloop_soft_aes_sandybridge_asm)
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.global FN_PREFIX(cnv2_mainloop_soft_aes_sandybridge_asm)
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv1_mainloop_sandybridge_asm):
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sub rsp, 48
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mov rcx, rdi
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#include "cnv1_mainloop_sandybridge.inc"
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add rsp, 48
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ret 0
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv2_mainloop_ivybridge_asm):
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sub rsp, 48
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mov rcx, rdi
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#include "cnv2_main_loop_ivybridge.inc"
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add rsp, 48
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ret 0
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv2_mainloop_ryzen_asm):
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sub rsp, 48
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mov rcx, rdi
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#include "cnv2_main_loop_ryzen.inc"
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add rsp, 48
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ret 0
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
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sub rsp, 48
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mov rcx, rdi
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mov rdx, rsi
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#include "cnv2_double_main_loop_sandybridge.inc"
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add rsp, 48
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ret 0
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv1_mainloop_soft_aes_sandybridge_asm):
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sub rsp, 48
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mov rcx, rdi
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#include "cnv1_mainloop_soft_aes_sandybridge.inc"
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add rsp, 48
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ret 0
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#ifdef __APPLE__
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ALIGN 16
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#else
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ALIGN 64
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#endif
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FN_PREFIX(cnv2_mainloop_soft_aes_sandybridge_asm):
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sub rsp, 48
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mov rcx, rdi
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#include "cnv2_mainloop_soft_aes_sandybridge.inc"
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add rsp, 48
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ret 0 |