5e66efabcf
From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms > The platforms reserve register x18. Don’t use this register. This PR fixes invalid hashes when running on Apple silicon with the latest macOS SDK.
583 lines
14 KiB
ArmAsm
583 lines
14 KiB
ArmAsm
# Copyright (c) 2018-2019, tevador <tevador@gmail.com>
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# Copyright (c) 2019, SChernykh <https://github.com/SChernykh>
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#
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# * Neither the name of the copyright holder nor the
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# names of its contributors may be used to endorse or promote products
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# derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#if defined(__APPLE__)
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#define DECL(x) _##x
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#else
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#define DECL(x) x
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#endif
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.arch armv8-a
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.text
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.global DECL(randomx_program_aarch64)
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.global DECL(randomx_program_aarch64_main_loop)
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.global DECL(randomx_program_aarch64_vm_instructions)
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.global DECL(randomx_program_aarch64_imul_rcp_literals_end)
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.global DECL(randomx_program_aarch64_vm_instructions_end)
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.global DECL(randomx_program_aarch64_cacheline_align_mask1)
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.global DECL(randomx_program_aarch64_cacheline_align_mask2)
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.global DECL(randomx_program_aarch64_update_spMix1)
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.global DECL(randomx_program_aarch64_vm_instructions_end_light)
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.global DECL(randomx_program_aarch64_light_cacheline_align_mask)
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.global DECL(randomx_program_aarch64_light_dataset_offset)
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.global DECL(randomx_init_dataset_aarch64)
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.global DECL(randomx_init_dataset_aarch64_end)
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.global DECL(randomx_calc_dataset_item_aarch64)
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.global DECL(randomx_calc_dataset_item_aarch64_prefetch)
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.global DECL(randomx_calc_dataset_item_aarch64_mix)
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.global DECL(randomx_calc_dataset_item_aarch64_store_result)
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.global DECL(randomx_calc_dataset_item_aarch64_end)
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# Register allocation
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# x0 -> pointer to reg buffer and then literal for IMUL_RCP
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# x1 -> pointer to mem buffer and then to dataset
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# x2 -> pointer to scratchpad
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# x3 -> loop counter
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# x4 -> "r0"
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# x5 -> "r1"
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# x6 -> "r2"
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# x7 -> "r3"
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# x8 -> fpcr (reversed bits)
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# x9 -> mx, ma
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# x10 -> spMix1
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# x11 -> literal for IMUL_RCP
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# x12 -> "r4"
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# x13 -> "r5"
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# x14 -> "r6"
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# x15 -> "r7"
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# x16 -> spAddr0
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# x17 -> spAddr1
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# x18 -> unused (platform register, don't touch it)
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# x19 -> temporary
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# x20 -> temporary
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# x21 -> literal for IMUL_RCP
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# x22 -> literal for IMUL_RCP
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# x23 -> literal for IMUL_RCP
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# x24 -> literal for IMUL_RCP
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# x25 -> literal for IMUL_RCP
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# x26 -> literal for IMUL_RCP
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# x27 -> literal for IMUL_RCP
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# x28 -> literal for IMUL_RCP
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# x29 -> literal for IMUL_RCP
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# x30 -> literal for IMUL_RCP
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# v0-v15 -> store 32-bit literals
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# v16 -> "f0"
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# v17 -> "f1"
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# v18 -> "f2"
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# v19 -> "f3"
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# v20 -> "e0"
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# v21 -> "e1"
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# v22 -> "e2"
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# v23 -> "e3"
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# v24 -> "a0"
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# v25 -> "a1"
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# v26 -> "a2"
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# v27 -> "a3"
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# v28 -> temporary
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# v29 -> E 'and' mask = 0x00ffffffffffffff00ffffffffffffff
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# v30 -> E 'or' mask = 0x3*00000000******3*00000000******
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# v31 -> scale mask = 0x81f000000000000081f0000000000000
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.balign 4
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DECL(randomx_program_aarch64):
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# Save callee-saved registers
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sub sp, sp, 192
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stp x16, x17, [sp]
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str x19, [sp, 16]
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stp x20, x21, [sp, 32]
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stp x22, x23, [sp, 48]
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stp x24, x25, [sp, 64]
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stp x26, x27, [sp, 80]
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stp x28, x29, [sp, 96]
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stp x8, x30, [sp, 112]
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stp d8, d9, [sp, 128]
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stp d10, d11, [sp, 144]
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stp d12, d13, [sp, 160]
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stp d14, d15, [sp, 176]
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# Zero integer registers
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mov x4, xzr
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mov x5, xzr
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mov x6, xzr
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mov x7, xzr
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mov x12, xzr
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mov x13, xzr
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mov x14, xzr
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mov x15, xzr
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# Load ma, mx and dataset pointer
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ldp x9, x1, [x1]
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# Load initial spMix value
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mov x10, x9
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# Load group A registers
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ldp q24, q25, [x0, 192]
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ldp q26, q27, [x0, 224]
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# Load E 'and' mask
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mov x16, 0x00FFFFFFFFFFFFFF
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ins v29.d[0], x16
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ins v29.d[1], x16
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# Load E 'or' mask (stored in reg.f[0])
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ldr q30, [x0, 64]
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# Load scale mask
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mov x16, 0x80f0000000000000
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ins v31.d[0], x16
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ins v31.d[1], x16
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# Read fpcr
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mrs x8, fpcr
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rbit x8, x8
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# Save x0
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str x0, [sp, -16]!
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# Read literals
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ldr x0, literal_x0
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ldr x11, literal_x11
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ldr x21, literal_x21
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ldr x22, literal_x22
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ldr x23, literal_x23
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ldr x24, literal_x24
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ldr x25, literal_x25
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ldr x26, literal_x26
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ldr x27, literal_x27
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ldr x28, literal_x28
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ldr x29, literal_x29
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ldr x30, literal_x30
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ldr q0, literal_v0
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ldr q1, literal_v1
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ldr q2, literal_v2
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ldr q3, literal_v3
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ldr q4, literal_v4
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ldr q5, literal_v5
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ldr q6, literal_v6
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ldr q7, literal_v7
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ldr q8, literal_v8
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ldr q9, literal_v9
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ldr q10, literal_v10
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ldr q11, literal_v11
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ldr q12, literal_v12
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ldr q13, literal_v13
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ldr q14, literal_v14
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ldr q15, literal_v15
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DECL(randomx_program_aarch64_main_loop):
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# spAddr0 = spMix1 & ScratchpadL3Mask64;
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# spAddr1 = (spMix1 >> 32) & ScratchpadL3Mask64;
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lsr x20, x10, 32
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# Actual mask will be inserted by JIT compiler
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and w16, w10, 1
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and w17, w20, 1
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# x16 = scratchpad + spAddr0
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# x17 = scratchpad + spAddr1
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add x16, x16, x2
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add x17, x17, x2
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# xor integer registers with scratchpad data (spAddr0)
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ldp x20, x19, [x16]
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eor x4, x4, x20
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eor x5, x5, x19
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ldp x20, x19, [x16, 16]
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eor x6, x6, x20
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eor x7, x7, x19
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ldp x20, x19, [x16, 32]
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eor x12, x12, x20
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eor x13, x13, x19
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ldp x20, x19, [x16, 48]
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eor x14, x14, x20
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eor x15, x15, x19
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# Load group F registers (spAddr1)
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ldpsw x20, x19, [x17]
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ins v16.d[0], x20
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ins v16.d[1], x19
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ldpsw x20, x19, [x17, 8]
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ins v17.d[0], x20
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ins v17.d[1], x19
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ldpsw x20, x19, [x17, 16]
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ins v18.d[0], x20
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ins v18.d[1], x19
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ldpsw x20, x19, [x17, 24]
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ins v19.d[0], x20
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ins v19.d[1], x19
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scvtf v16.2d, v16.2d
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scvtf v17.2d, v17.2d
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scvtf v18.2d, v18.2d
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scvtf v19.2d, v19.2d
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# Load group E registers (spAddr1)
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ldpsw x20, x19, [x17, 32]
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ins v20.d[0], x20
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ins v20.d[1], x19
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ldpsw x20, x19, [x17, 40]
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ins v21.d[0], x20
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ins v21.d[1], x19
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ldpsw x20, x19, [x17, 48]
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ins v22.d[0], x20
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ins v22.d[1], x19
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ldpsw x20, x19, [x17, 56]
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ins v23.d[0], x20
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ins v23.d[1], x19
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scvtf v20.2d, v20.2d
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scvtf v21.2d, v21.2d
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scvtf v22.2d, v22.2d
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scvtf v23.2d, v23.2d
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and v20.16b, v20.16b, v29.16b
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and v21.16b, v21.16b, v29.16b
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and v22.16b, v22.16b, v29.16b
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and v23.16b, v23.16b, v29.16b
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orr v20.16b, v20.16b, v30.16b
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orr v21.16b, v21.16b, v30.16b
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orr v22.16b, v22.16b, v30.16b
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orr v23.16b, v23.16b, v30.16b
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# Execute VM instructions
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DECL(randomx_program_aarch64_vm_instructions):
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# 16 KB buffer for generated instructions
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.fill 4096,4,0
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literal_x0: .fill 1,8,0
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literal_x11: .fill 1,8,0
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literal_x21: .fill 1,8,0
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literal_x22: .fill 1,8,0
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literal_x23: .fill 1,8,0
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literal_x24: .fill 1,8,0
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literal_x25: .fill 1,8,0
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literal_x26: .fill 1,8,0
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literal_x27: .fill 1,8,0
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literal_x28: .fill 1,8,0
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literal_x29: .fill 1,8,0
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literal_x30: .fill 1,8,0
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DECL(randomx_program_aarch64_imul_rcp_literals_end):
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literal_v0: .fill 2,8,0
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literal_v1: .fill 2,8,0
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literal_v2: .fill 2,8,0
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literal_v3: .fill 2,8,0
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literal_v4: .fill 2,8,0
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literal_v5: .fill 2,8,0
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literal_v6: .fill 2,8,0
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literal_v7: .fill 2,8,0
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literal_v8: .fill 2,8,0
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literal_v9: .fill 2,8,0
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literal_v10: .fill 2,8,0
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literal_v11: .fill 2,8,0
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literal_v12: .fill 2,8,0
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literal_v13: .fill 2,8,0
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literal_v14: .fill 2,8,0
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literal_v15: .fill 2,8,0
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DECL(randomx_program_aarch64_vm_instructions_end):
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# Calculate dataset pointer for dataset read
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# Do it here to break false dependency from readReg2 and readReg3 (see next line)
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lsr x10, x9, 32
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# mx ^= r[readReg2] ^ r[readReg3];
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eor x9, x9, x20
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# Calculate dataset pointer for dataset prefetch
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mov w20, w9
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DECL(randomx_program_aarch64_cacheline_align_mask1):
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# Actual mask will be inserted by JIT compiler
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and x20, x20, 1
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add x20, x20, x1
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# Prefetch dataset data
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prfm pldl2strm, [x20]
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# mx <-> ma
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ror x9, x9, 32
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DECL(randomx_program_aarch64_cacheline_align_mask2):
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# Actual mask will be inserted by JIT compiler
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and x10, x10, 1
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add x10, x10, x1
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DECL(randomx_program_aarch64_xor_with_dataset_line):
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# xor integer registers with dataset data
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ldp x20, x19, [x10]
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eor x4, x4, x20
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eor x5, x5, x19
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ldp x20, x19, [x10, 16]
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eor x6, x6, x20
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eor x7, x7, x19
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ldp x20, x19, [x10, 32]
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eor x12, x12, x20
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eor x13, x13, x19
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ldp x20, x19, [x10, 48]
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eor x14, x14, x20
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eor x15, x15, x19
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DECL(randomx_program_aarch64_update_spMix1):
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# JIT compiler will replace it with "eor x10, config.readReg0, config.readReg1"
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eor x10, x0, x0
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# Store integer registers to scratchpad (spAddr1)
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stp x4, x5, [x17, 0]
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stp x6, x7, [x17, 16]
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stp x12, x13, [x17, 32]
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stp x14, x15, [x17, 48]
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# xor group F and group E registers
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eor v16.16b, v16.16b, v20.16b
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eor v17.16b, v17.16b, v21.16b
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eor v18.16b, v18.16b, v22.16b
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eor v19.16b, v19.16b, v23.16b
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# Store FP registers to scratchpad (spAddr0)
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stp q16, q17, [x16, 0]
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stp q18, q19, [x16, 32]
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subs x3, x3, 1
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bne DECL(randomx_program_aarch64_main_loop)
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# Restore x0
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ldr x0, [sp], 16
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# Store integer registers
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stp x4, x5, [x0, 0]
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stp x6, x7, [x0, 16]
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stp x12, x13, [x0, 32]
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stp x14, x15, [x0, 48]
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# Store FP registers
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stp q16, q17, [x0, 64]
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stp q18, q19, [x0, 96]
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stp q20, q21, [x0, 128]
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stp q22, q23, [x0, 160]
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# Restore callee-saved registers
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ldp x16, x17, [sp]
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ldr x19, [sp, 16]
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ldp x20, x21, [sp, 32]
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ldp x22, x23, [sp, 48]
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ldp x24, x25, [sp, 64]
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ldp x26, x27, [sp, 80]
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ldp x28, x29, [sp, 96]
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ldp x8, x30, [sp, 112]
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ldp d8, d9, [sp, 128]
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ldp d10, d11, [sp, 144]
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ldp d12, d13, [sp, 160]
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ldp d14, d15, [sp, 176]
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add sp, sp, 192
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ret
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DECL(randomx_program_aarch64_vm_instructions_end_light):
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sub sp, sp, 96
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stp x0, x1, [sp, 64]
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stp x2, x30, [sp, 80]
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# mx ^= r[readReg2] ^ r[readReg3];
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eor x9, x9, x20
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# mx <-> ma
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ror x9, x9, 32
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# x0 -> pointer to cache memory
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mov x0, x1
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# x1 -> pointer to output
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mov x1, sp
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DECL(randomx_program_aarch64_light_cacheline_align_mask):
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# Actual mask will be inserted by JIT compiler
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and w2, w9, 1
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# x2 -> item number
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lsr x2, x2, 6
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DECL(randomx_program_aarch64_light_dataset_offset):
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# Apply dataset offset (filled in by JIT compiler)
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add x2, x2, 0
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add x2, x2, 0
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bl DECL(randomx_calc_dataset_item_aarch64)
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mov x10, sp
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ldp x0, x1, [sp, 64]
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ldp x2, x30, [sp, 80]
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add sp, sp, 96
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b DECL(randomx_program_aarch64_xor_with_dataset_line)
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# Input parameters
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#
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# x0 -> pointer to cache
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# x1 -> pointer to dataset memory at startItem
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# x2 -> start item
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# x3 -> end item
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DECL(randomx_init_dataset_aarch64):
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# Save x20 (used as temporary, but must be saved to not break ABI) and x30 (return address)
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stp x20, x30, [sp, -16]!
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# Load pointer to cache memory
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ldr x0, [x0]
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DECL(randomx_init_dataset_aarch64_main_loop):
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bl DECL(randomx_calc_dataset_item_aarch64)
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add x1, x1, 64
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add x2, x2, 1
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cmp x2, x3
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bne DECL(randomx_init_dataset_aarch64_main_loop)
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# Restore x20 and x30
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ldp x20, x30, [sp], 16
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|
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ret
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|
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DECL(randomx_init_dataset_aarch64_end):
|
|
|
|
# Input parameters
|
|
#
|
|
# x0 -> pointer to cache memory
|
|
# x1 -> pointer to output
|
|
# x2 -> item number
|
|
#
|
|
# Register allocation
|
|
#
|
|
# x0-x7 -> output value (calculated dataset item)
|
|
# x8 -> pointer to cache memory
|
|
# x9 -> pointer to output
|
|
# x10 -> registerValue
|
|
# x11 -> mixBlock
|
|
# x12 -> temporary
|
|
# x13 -> temporary
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|
|
|
DECL(randomx_calc_dataset_item_aarch64):
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|
sub sp, sp, 112
|
|
stp x0, x1, [sp]
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|
stp x2, x3, [sp, 16]
|
|
stp x4, x5, [sp, 32]
|
|
stp x6, x7, [sp, 48]
|
|
stp x8, x9, [sp, 64]
|
|
stp x10, x11, [sp, 80]
|
|
stp x12, x13, [sp, 96]
|
|
|
|
ldr x12, superscalarMul0
|
|
|
|
mov x8, x0
|
|
mov x9, x1
|
|
mov x10, x2
|
|
|
|
# rl[0] = (itemNumber + 1) * superscalarMul0;
|
|
madd x0, x2, x12, x12
|
|
|
|
# rl[1] = rl[0] ^ superscalarAdd1;
|
|
ldr x12, superscalarAdd1
|
|
eor x1, x0, x12
|
|
|
|
# rl[2] = rl[0] ^ superscalarAdd2;
|
|
ldr x12, superscalarAdd2
|
|
eor x2, x0, x12
|
|
|
|
# rl[3] = rl[0] ^ superscalarAdd3;
|
|
ldr x12, superscalarAdd3
|
|
eor x3, x0, x12
|
|
|
|
# rl[4] = rl[0] ^ superscalarAdd4;
|
|
ldr x12, superscalarAdd4
|
|
eor x4, x0, x12
|
|
|
|
# rl[5] = rl[0] ^ superscalarAdd5;
|
|
ldr x12, superscalarAdd5
|
|
eor x5, x0, x12
|
|
|
|
# rl[6] = rl[0] ^ superscalarAdd6;
|
|
ldr x12, superscalarAdd6
|
|
eor x6, x0, x12
|
|
|
|
# rl[7] = rl[0] ^ superscalarAdd7;
|
|
ldr x12, superscalarAdd7
|
|
eor x7, x0, x12
|
|
|
|
b DECL(randomx_calc_dataset_item_aarch64_prefetch)
|
|
|
|
superscalarMul0: .quad 6364136223846793005
|
|
superscalarAdd1: .quad 9298411001130361340
|
|
superscalarAdd2: .quad 12065312585734608966
|
|
superscalarAdd3: .quad 9306329213124626780
|
|
superscalarAdd4: .quad 5281919268842080866
|
|
superscalarAdd5: .quad 10536153434571861004
|
|
superscalarAdd6: .quad 3398623926847679864
|
|
superscalarAdd7: .quad 9549104520008361294
|
|
|
|
# Prefetch -> SuperScalar hash -> Mix will be repeated N times
|
|
|
|
DECL(randomx_calc_dataset_item_aarch64_prefetch):
|
|
# Actual mask will be inserted by JIT compiler
|
|
and x11, x10, 1
|
|
add x11, x8, x11, lsl 6
|
|
prfm pldl2strm, [x11]
|
|
|
|
# Generated SuperScalar hash program goes here
|
|
|
|
DECL(randomx_calc_dataset_item_aarch64_mix):
|
|
ldp x12, x13, [x11]
|
|
eor x0, x0, x12
|
|
eor x1, x1, x13
|
|
ldp x12, x13, [x11, 16]
|
|
eor x2, x2, x12
|
|
eor x3, x3, x13
|
|
ldp x12, x13, [x11, 32]
|
|
eor x4, x4, x12
|
|
eor x5, x5, x13
|
|
ldp x12, x13, [x11, 48]
|
|
eor x6, x6, x12
|
|
eor x7, x7, x13
|
|
|
|
DECL(randomx_calc_dataset_item_aarch64_store_result):
|
|
stp x0, x1, [x9]
|
|
stp x2, x3, [x9, 16]
|
|
stp x4, x5, [x9, 32]
|
|
stp x6, x7, [x9, 48]
|
|
|
|
ldp x0, x1, [sp]
|
|
ldp x2, x3, [sp, 16]
|
|
ldp x4, x5, [sp, 32]
|
|
ldp x6, x7, [sp, 48]
|
|
ldp x8, x9, [sp, 64]
|
|
ldp x10, x11, [sp, 80]
|
|
ldp x12, x13, [sp, 96]
|
|
add sp, sp, 112
|
|
|
|
ret
|
|
|
|
DECL(randomx_calc_dataset_item_aarch64_end):
|