From 11bfc7fe77066174011df40ff81fde52e9cbe97a Mon Sep 17 00:00:00 2001 From: degasus Date: Sun, 11 Sep 2016 15:34:51 +0200 Subject: [PATCH] JitArm64: Move memcheck check into fallback code. So now each implemented slowmem instruction should check for DSI on each own. --- Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 40 +++++++++++------------ 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp index d36a343257..3564c91c01 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp @@ -120,6 +120,26 @@ void JitArm64::FallBackToInterpreter(UGeckoInstruction inst) SetJumpTarget(c); } } + + if (jo.memcheck && (js.op->opinfo->flags & FL_LOADSTORE)) + { + ARM64Reg WA = gpr.GetReg(); + LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); + FixupBranch noException = TBZ(WA, IntLog2(EXCEPTION_DSI)); + + FixupBranch handleException = B(); + SwitchToFarCode(); + SetJumpTarget(handleException); + + gpr.Flush(FLUSH_MAINTAIN_STATE); + fpr.Flush(FLUSH_MAINTAIN_STATE); + + WriteExceptionExit(js.compilerPC); + + SwitchToNearCode(); + SetJumpTarget(noException); + gpr.Unlock(WA); + } } void JitArm64::HLEFunction(UGeckoInstruction inst) @@ -598,26 +618,6 @@ const u8* JitArm64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer* code_buf, JitB // If we have a register that will never be used again, flush it. gpr.StoreRegisters(~ops[i].gprInUse); fpr.StoreRegisters(~ops[i].fprInUse); - - if (jo.memcheck && (opinfo->flags & FL_LOADSTORE)) - { - ARM64Reg WA = gpr.GetReg(); - LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); - FixupBranch noException = TBZ(WA, IntLog2(EXCEPTION_DSI)); - - FixupBranch handleException = B(); - SwitchToFarCode(); - SetJumpTarget(handleException); - - gpr.Flush(FLUSH_MAINTAIN_STATE); - fpr.Flush(FLUSH_MAINTAIN_STATE); - - WriteExceptionExit(js.compilerPC); - - SwitchToNearCode(); - SetJumpTarget(noException); - gpr.Unlock(WA); - } } i += js.skipInstructions;