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[ARM] Implement andx, andi_rc, and andis_rc.
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42aef24d78
commit
4ed8972c30
@ -154,6 +154,9 @@ public:
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void oris(UGeckoInstruction _inst);
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void oris(UGeckoInstruction _inst);
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void orx(UGeckoInstruction _inst);
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void orx(UGeckoInstruction _inst);
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void xorx(UGeckoInstruction _inst);
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void xorx(UGeckoInstruction _inst);
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void andx(UGeckoInstruction _inst);
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void andi_rc(UGeckoInstruction _inst);
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void andis_rc(UGeckoInstruction _inst);
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void rlwimix(UGeckoInstruction _inst);
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void rlwimix(UGeckoInstruction _inst);
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void rlwinmx(UGeckoInstruction _inst);
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void rlwinmx(UGeckoInstruction _inst);
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void subfx(UGeckoInstruction _inst);
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void subfx(UGeckoInstruction _inst);
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@ -246,6 +246,68 @@ void JitArm::xorx(UGeckoInstruction inst)
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if (inst.Rc)
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if (inst.Rc)
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ComputeRC();
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ComputeRC();
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}
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}
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void JitArm::andx(UGeckoInstruction inst)
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{
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u32 a = inst.RA, b = inst.RB, s = inst.RS;
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if (gpr.IsImm(s) && gpr.IsImm(b))
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{
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gpr.SetImmediate(a, gpr.GetImm(s) & gpr.GetImm(b));
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if (inst.Rc) ComputeRC(gpr.GetImm(a), 0);
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return;
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}
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ARMReg rA = gpr.R(a);
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ARMReg rB = gpr.R(b);
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ARMReg rS = gpr.R(s);
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ANDS(rA, rS, rB);
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if (inst.Rc) ComputeRC();
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}
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void JitArm::andi_rc(UGeckoInstruction inst)
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{
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u32 a = inst.RA, s = inst.RS;
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if (gpr.IsImm(s))
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{
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gpr.SetImmediate(a, gpr.GetImm(s) & inst.UIMM);
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ComputeRC(gpr.GetImm(a), 0);
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return;
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}
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ARMReg rA = gpr.R(a);
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ARMReg rS = gpr.R(s);
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ARMReg RA = gpr.GetReg();
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MOVI2R(RA, inst.UIMM);
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ANDS(rA, rS, RA);
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ComputeRC();
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gpr.Unlock(RA);
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}
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void JitArm::andis_rc(UGeckoInstruction inst)
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{
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u32 a = inst.RA, s = inst.RS;
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if (gpr.IsImm(s))
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{
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gpr.SetImmediate(a, gpr.GetImm(s) & ((u32)inst.UIMM << 16));
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ComputeRC(gpr.GetImm(a), 0);
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return;
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}
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ARMReg rA = gpr.R(a);
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ARMReg rS = gpr.R(s);
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ARMReg RA = gpr.GetReg();
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MOVI2R(RA, (u32)inst.UIMM << 16);
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ANDS(rA, rS, RA);
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ComputeRC();
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gpr.Unlock(RA);
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}
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void JitArm::extshx(UGeckoInstruction inst)
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void JitArm::extshx(UGeckoInstruction inst)
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{
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{
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INSTRUCTION_START
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INSTRUCTION_START
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@ -75,8 +75,8 @@ static GekkoOPTemplate primarytable[] =
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{25, &JitArm::oris}, //"oris", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{25, &JitArm::oris}, //"oris", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{26, &JitArm::Default}, //"xori", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{26, &JitArm::Default}, //"xori", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{27, &JitArm::Default}, //"xoris", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{27, &JitArm::Default}, //"xoris", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
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{28, &JitArm::Default}, //"andi_rc", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_SET_CR0}},
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{28, &JitArm::andi_rc}, //"andi_rc", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_SET_CR0}},
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{29, &JitArm::Default}, //"andis_rc", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_SET_CR0}},
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{29, &JitArm::andis_rc}, //"andis_rc", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_SET_CR0}},
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{32, &JitArm::lwz}, //"lwz", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},
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{32, &JitArm::lwz}, //"lwz", OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},
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{33, &JitArm::Default}, //"lwzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}},
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{33, &JitArm::Default}, //"lwzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}},
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@ -194,7 +194,7 @@ static GekkoOPTemplate table19[] =
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static GekkoOPTemplate table31[] =
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static GekkoOPTemplate table31[] =
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{
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{
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{28, &JitArm::Default}, //"andx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{28, &JitArm::andx}, //"andx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{60, &JitArm::Default}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{60, &JitArm::Default}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{444, &JitArm::orx}, //"orx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{444, &JitArm::orx}, //"orx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{124, &JitArm::Default}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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{124, &JitArm::Default}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}},
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