diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp index 850612cb18..e411823429 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp @@ -705,18 +705,18 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc // Remove the invalid instruction from the icache, forcing a recompile #ifdef _M_IX86 if (js.compilerPC & JIT_ICACHE_VMEM_BIT) - MOV(32, M((jit->GetBlockCache()->GetICacheVMEM() + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + MOV(32, M((jit->GetBlockCache()->iCacheVMEM + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); else if (js.compilerPC & JIT_ICACHE_EXRAM_BIT) - MOV(32, M((jit->GetBlockCache()->GetICacheEx() + (js.compilerPC & JIT_ICACHEEX_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + MOV(32, M((jit->GetBlockCache()->iCacheEx + (js.compilerPC & JIT_ICACHEEX_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); else - MOV(32, M((jit->GetBlockCache()->GetICache() + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + MOV(32, M((jit->GetBlockCache()->iCache + (js.compilerPC & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); #else if (js.compilerPC & JIT_ICACHE_VMEM_BIT) - MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheVMEM() + (js.compilerPC & JIT_ICACHE_MASK))); + MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCacheVMEM + (js.compilerPC & JIT_ICACHE_MASK))); else if (js.compilerPC & JIT_ICACHE_EXRAM_BIT) - MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheEx() + (js.compilerPC & JIT_ICACHEEX_MASK))); + MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCacheEx + (js.compilerPC & JIT_ICACHEEX_MASK))); else - MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICache() + (js.compilerPC & JIT_ICACHE_MASK))); + MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCache + (js.compilerPC & JIT_ICACHE_MASK))); MOV(32,MatR(RAX),Imm32(JIT_ICACHE_INVALID_WORD)); #endif diff --git a/Source/Core/Core/Src/PowerPC/Jit64/JitAsm.cpp b/Source/Core/Core/Src/PowerPC/Jit64/JitAsm.cpp index 626e3e0548..1be6b1318e 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/JitAsm.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/JitAsm.cpp @@ -100,9 +100,9 @@ void Jit64AsmRoutineManager::Generate() } AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICache())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCache)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICache())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCache)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif if (Core::g_CoreStartupParameter.bWii || Core::g_CoreStartupParameter.bMMU || Core::g_CoreStartupParameter.bTLBHack) @@ -116,9 +116,9 @@ void Jit64AsmRoutineManager::Generate() FixupBranch no_vmem = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICacheVMEM())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheVMEM)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICacheVMEM())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheVMEM)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif if (Core::g_CoreStartupParameter.bWii) exit_vmem = J(); @@ -130,9 +130,9 @@ void Jit64AsmRoutineManager::Generate() FixupBranch no_exram = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHEEX_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICacheEx())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheEx)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICacheEx())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheEx)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif SetJumpTarget(no_exram); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp index 2a9ee715bb..a81d1308be 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp @@ -1765,19 +1765,19 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit) { // Remove the invalid instruction from the icache, forcing a recompile #ifdef _M_IX86 if (InstLoc & JIT_ICACHE_VMEM_BIT) - Jit->MOV(32, M((jit->GetBlockCache()->GetICacheVMEM() + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + Jit->MOV(32, M((jit->GetBlockCache()->iCacheVMEM + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); else if (InstLoc & JIT_ICACHE_EXRAM_BIT) - Jit->MOV(32, M((jit->GetBlockCache()->GetICacheEx() + (InstLoc & JIT_ICACHEEX_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + Jit->MOV(32, M((jit->GetBlockCache()->iCacheEx + (InstLoc & JIT_ICACHEEX_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); else - Jit->MOV(32, M((jit->GetBlockCache()->GetICache() + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); + Jit->MOV(32, M((jit->GetBlockCache()->iCache + (InstLoc & JIT_ICACHE_MASK))), Imm32(JIT_ICACHE_INVALID_WORD)); #else if (InstLoc & JIT_ICACHE_VMEM_BIT) - Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheVMEM() + (InstLoc & JIT_ICACHE_MASK))); + Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCacheVMEM + (InstLoc & JIT_ICACHE_MASK))); else if (InstLoc & JIT_ICACHE_EXRAM_BIT) - Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICacheEx() + (InstLoc & JIT_ICACHEEX_MASK))); + Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCacheEx + (InstLoc & JIT_ICACHEEX_MASK))); else - Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->GetICache() + (InstLoc & JIT_ICACHE_MASK))); + Jit->MOV(64, R(RAX), ImmPtr(jit->GetBlockCache()->iCache + (InstLoc & JIT_ICACHE_MASK))); Jit->MOV(32, MatR(RAX), Imm32(JIT_ICACHE_INVALID_WORD)); #endif Jit->WriteExceptionExit(); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitILAsm.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitILAsm.cpp index e0c36e9cbf..3fcafa2b83 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitILAsm.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitILAsm.cpp @@ -101,9 +101,9 @@ void JitILAsmRoutineManager::Generate() } AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICache())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCache)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICache())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCache)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif if (Core::g_CoreStartupParameter.bWii || Core::g_CoreStartupParameter.bMMU || Core::g_CoreStartupParameter.bTLBHack) @@ -117,9 +117,9 @@ void JitILAsmRoutineManager::Generate() FixupBranch no_vmem = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHE_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICacheVMEM())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheVMEM)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICacheVMEM())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheVMEM)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif if (Core::g_CoreStartupParameter.bWii) exit_vmem = J(); @@ -131,9 +131,9 @@ void JitILAsmRoutineManager::Generate() FixupBranch no_exram = J_CC(CC_Z); AND(32, R(EAX), Imm32(JIT_ICACHEEX_MASK)); #ifdef _M_IX86 - MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->GetICacheEx())); + MOV(32, R(EAX), MDisp(EAX, (u32)jit->GetBlockCache()->iCacheEx)); #else - MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->GetICacheEx())); + MOV(64, R(RSI), Imm64((u64)jit->GetBlockCache()->iCacheEx)); MOV(32, R(EAX), MComplex(RSI, EAX, SCALE_1, 0)); #endif SetJumpTarget(no_exram); diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp index d20ff66397..488e47c37a 100644 --- a/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp +++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitAsm.cpp @@ -131,7 +131,7 @@ void JitArmAsmRoutineManager::Generate() Operand2 iCacheMask = Operand2(0xE, 2); // JIT_ICACHE_MASK BIC(R12, R12, iCacheMask); // R12 contains PC & JIT_ICACHE_MASK here. - MOVI2R(R14, (u32)jit->GetBlockCache()->GetICache()); + MOVI2R(R14, (u32)jit->GetBlockCache()->iCache); LDR(R12, R14, R12); // R12 contains iCache[PC & JIT_ICACHE_MASK] here // R12 Confirmed this is the correct iCache Location loaded. diff --git a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp index ee17a4e089..7962fe847d 100644 --- a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp +++ b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.cpp @@ -60,8 +60,6 @@ bool JitBlock::ContainsAddress(u32 em_address) void JitBaseBlockCache::Init() { - MAX_NUM_BLOCKS = 65536*2; - #if defined USE_OPROFILE && USE_OPROFILE agent = op_open_agent(); #endif @@ -249,21 +247,6 @@ bool JitBlock::ContainsAddress(u32 em_address) return blockCodePointers; } - u8* JitBaseBlockCache::GetICache() - { - return iCache; - } - - u8* JitBaseBlockCache::GetICacheEx() - { - return iCacheEx; - } - - u8* JitBaseBlockCache::GetICacheVMEM() - { - return iCacheVMEM; - } - int JitBaseBlockCache::GetBlockNumberFromStartAddress(u32 addr) { if (!blocks) diff --git a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.h b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.h index f0f2d6fffe..2e50dc7a66 100644 --- a/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.h +++ b/Source/Core/Core/Src/PowerPC/JitCommon/JitCache.h @@ -73,10 +73,10 @@ class JitBaseBlockCache std::multimap links_to; std::map, u32> block_map; // (end_addr, start_addr) -> number std::bitset<0x20000000 / 32> valid_block; - u8 *iCache; - u8 *iCacheEx; - u8 *iCacheVMEM; - int MAX_NUM_BLOCKS; + enum + { + MAX_NUM_BLOCKS = 65536*2 + }; bool RangeIntersect(int s1, int e1, int s2, int e2) const; void LinkBlockExits(int i); @@ -90,8 +90,7 @@ class JitBaseBlockCache public: JitBaseBlockCache() : blockCodePointers(0), blocks(0), num_blocks(0), - iCache(0), iCacheEx(0), iCacheVMEM(0), - MAX_NUM_BLOCKS(0) { } + iCache(0), iCacheEx(0), iCacheVMEM(0) {} int AllocateBlock(u32 em_address); void FinalizeBlock(int block_num, bool block_link, const u8 *code_ptr); @@ -107,9 +106,9 @@ public: JitBlock *GetBlock(int block_num); int GetNumBlocks() const; const u8 **GetCodePointers(); - u8 *GetICache(); - u8 *GetICacheEx(); - u8 *GetICacheVMEM(); + u8 *iCache; + u8 *iCacheEx; + u8 *iCacheVMEM; // Fast way to get a block. Only works on the first ppc instruction of a block. int GetBlockNumberFromStartAddress(u32 em_address); diff --git a/Source/Core/Core/Src/PowerPC/JitInterface.cpp b/Source/Core/Core/Src/PowerPC/JitInterface.cpp index 59495df7a1..567473ef03 100644 --- a/Source/Core/Core/Src/PowerPC/JitInterface.cpp +++ b/Source/Core/Core/Src/PowerPC/JitInterface.cpp @@ -217,17 +217,17 @@ namespace JitInterface u32 addr; if (_Address & JIT_ICACHE_VMEM_BIT) { - iCache = jit->GetBlockCache()->GetICacheVMEM(); + iCache = jit->GetBlockCache()->iCacheVMEM; addr = _Address & JIT_ICACHE_MASK; } else if (_Address & JIT_ICACHE_EXRAM_BIT) { - iCache = jit->GetBlockCache()->GetICacheEx(); + iCache = jit->GetBlockCache()->iCacheEx; addr = _Address & JIT_ICACHEEX_MASK; } else { - iCache = jit->GetBlockCache()->GetICache(); + iCache = jit->GetBlockCache()->iCache; addr = _Address & JIT_ICACHE_MASK; } u32 inst = *(u32*)(iCache + addr); @@ -283,17 +283,17 @@ namespace JitInterface u32 addr; if (_Address & JIT_ICACHE_VMEM_BIT) { - iCache = jit->GetBlockCache()->GetICacheVMEM(); + iCache = jit->GetBlockCache()->iCacheVMEM; addr = _Address & JIT_ICACHE_MASK; } else if (_Address & JIT_ICACHE_EXRAM_BIT) { - iCache = jit->GetBlockCache()->GetICacheEx(); + iCache = jit->GetBlockCache()->iCacheEx; addr = _Address & JIT_ICACHEEX_MASK; } else { - iCache = jit->GetBlockCache()->GetICache(); + iCache = jit->GetBlockCache()->iCache; addr = _Address & JIT_ICACHE_MASK; } u32 inst = *(u32*)(iCache + addr); @@ -314,14 +314,14 @@ namespace JitInterface { if (_Address & JIT_ICACHE_VMEM_BIT) { - *(u32*)(jit->GetBlockCache()->GetICacheVMEM() + (_Address & JIT_ICACHE_MASK)) = Common::swap32(_Value); + *(u32*)(jit->GetBlockCache()->iCacheVMEM + (_Address & JIT_ICACHE_MASK)) = Common::swap32(_Value); } else if (_Address & JIT_ICACHE_EXRAM_BIT) { - *(u32*)(jit->GetBlockCache()->GetICacheEx() + (_Address & JIT_ICACHEEX_MASK)) = Common::swap32(_Value); + *(u32*)(jit->GetBlockCache()->iCacheEx + (_Address & JIT_ICACHEEX_MASK)) = Common::swap32(_Value); } else - *(u32*)(jit->GetBlockCache()->GetICache() + (_Address & JIT_ICACHE_MASK)) = Common::swap32(_Value); + *(u32*)(jit->GetBlockCache()->iCache + (_Address & JIT_ICACHE_MASK)) = Common::swap32(_Value); }