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Optimize mtmsr by going to an exception exit only if EE are enabled and some

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exceptions are pending.
This commit is contained in:
Pierre Bourdon 2012-06-19 06:35:30 +02:00
parent bfc797ede1
commit 76a13604ef
2 changed files with 33 additions and 4 deletions
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20
Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp
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@ -123,10 +123,24 @@ void Jit64::mtmsr(UGeckoInstruction inst)
gpr.Flush(FLUSH_ALL); gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL); fpr.Flush(FLUSH_ALL);
// Force an external exception when going out of mtmsr in order to check // If some exceptions are pending and EE are now enabled, force checking
// immediately for interrupts that were delayed because of MSR.EE=0. // external exceptions when going out of mtmsr in order to execute delayed
// interrupts as soon as possible.
MOV(32, R(EAX), M(&MSR));
TEST(32, R(EAX), Imm32(0x8000));
FixupBranch eeDisabled = J_CC(CC_Z);
MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions));
TEST(32, R(EAX), R(EAX));
FixupBranch noExceptionsPending = J_CC(CC_Z);
MOV(32, M(&PC), Imm32(js.compilerPC + 4)); MOV(32, M(&PC), Imm32(js.compilerPC + 4));
WriteExceptionExit(); WriteExternalExceptionExit();
SetJumpTarget(eeDisabled);
SetJumpTarget(noExceptionsPending);
WriteExit(js.compilerPC + 4, 0);
js.firstFPInstructionFound = false; js.firstFPInstructionFound = false;
} }

17
Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
View File

@ -997,8 +997,23 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
unsigned InstLoc = ibuild->GetImmValue(getOp2(I)); unsigned InstLoc = ibuild->GetImmValue(getOp2(I));
regStoreInstToConstLoc(RI, 32, getOp1(I), &MSR); regStoreInstToConstLoc(RI, 32, getOp1(I), &MSR);
regNormalRegClear(RI, I); regNormalRegClear(RI, I);
// If some exceptions are pending and EE are now enabled, force checking
// external exceptions when going out of mtmsr in order to execute delayed
// interrupts as soon as possible.
Jit->MOV(32, R(EAX), M(&MSR));
Jit->TEST(32, R(EAX), Imm32(0x8000));
FixupBranch eeDisabled = Jit->J_CC(CC_Z);
Jit->MOV(32, R(EAX), M((void*)&PowerPC::ppcState.Exceptions));
Jit->TEST(32, R(EAX), R(EAX));
FixupBranch noExceptionsPending = Jit->J_CC(CC_Z);
Jit->MOV(32, M(&PC), Imm32(InstLoc + 4)); Jit->MOV(32, M(&PC), Imm32(InstLoc + 4));
Jit->WriteExceptionExit(); Jit->WriteExceptionExit(); // TODO: Implement WriteExternalExceptionExit for JitIL
Jit->SetJumpTarget(eeDisabled);
Jit->SetJumpTarget(noExceptionsPending);
break; break;
} }
case StoreGQR: { case StoreGQR: {