From bab3032185bd54db995c616b0c58897901adbdd1 Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Tue, 16 Jul 2013 22:20:18 -0500
Subject: [PATCH] On ARM Hosts, increase the instruction run count to 64bit.
 32bit is /very/ quickly overflown.

---
 Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp | 13 ++++++++++---
 Source/Core/Core/Src/PowerPC/PPCTables.h      |  4 ++++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp
index 2c25268c23..a4988f7c17 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp
@@ -457,13 +457,20 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
 		if (Core::g_CoreStartupParameter.bEnableDebugging)
 		{
 			// Add run count
+			static const u64 One = 1;
 			ARMReg RA = gpr.GetReg();
 			ARMReg RB = gpr.GetReg();
+			ARMReg VA = fpr.GetReg();
+			ARMReg VB = fpr.GetReg();
 			MOVI2R(RA, (u32)&opinfo->runCount);
-			LDR(RB, RA);
-			ADD(RB, RB, 1);
-			STR(RB, RA);
+			MOVI2R(RB, (u32)&One);
+			VLDR(VA, RA, 0);
+			VLDR(VB, RB, 0);
+			VADD(I_I64, VA, VA, VB);
+			VSTR(VA, RA, 0);
 			gpr.Unlock(RA, RB);
+			fpr.Unlock(VA);
+			fpr.Unlock(VB);
 		}
 		if (!ops[i].skip)
 		{
diff --git a/Source/Core/Core/Src/PowerPC/PPCTables.h b/Source/Core/Core/Src/PowerPC/PPCTables.h
index f47df6e552..5b4fb5d11c 100644
--- a/Source/Core/Core/Src/PowerPC/PPCTables.h
+++ b/Source/Core/Core/Src/PowerPC/PPCTables.h
@@ -77,7 +77,11 @@ struct GekkoOPInfo
 	int type;
 	int flags;
 	int numCyclesMinusOne;
+#ifdef _M_ARM
+	u64 runCount;
+#else
 	int runCount;
+#endif
 	int compileCount;
 	u32 lastUse;
 };