diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index ff1a6b137f..ef569cbd3a 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -965,7 +965,7 @@ FixupBranch ARM64XEmitter::CBZ(ARM64Reg Rt)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::CBZ;
   branch.reg = Rt;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::CBNZ(ARM64Reg Rt)
@@ -974,7 +974,7 @@ FixupBranch ARM64XEmitter::CBNZ(ARM64Reg Rt)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::CBNZ;
   branch.reg = Rt;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::B(CCFlags cond)
@@ -983,7 +983,7 @@ FixupBranch ARM64XEmitter::B(CCFlags cond)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::BConditional;
   branch.cond = cond;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::TBZ(ARM64Reg Rt, u8 bit)
@@ -993,7 +993,7 @@ FixupBranch ARM64XEmitter::TBZ(ARM64Reg Rt, u8 bit)
   branch.type = FixupBranch::Type::TBZ;
   branch.reg = Rt;
   branch.bit = bit;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::TBNZ(ARM64Reg Rt, u8 bit)
@@ -1003,7 +1003,7 @@ FixupBranch ARM64XEmitter::TBNZ(ARM64Reg Rt, u8 bit)
   branch.type = FixupBranch::Type::TBNZ;
   branch.reg = Rt;
   branch.bit = bit;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::B()
@@ -1011,7 +1011,7 @@ FixupBranch ARM64XEmitter::B()
   FixupBranch branch{};
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::B;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 FixupBranch ARM64XEmitter::BL()
@@ -1019,7 +1019,7 @@ FixupBranch ARM64XEmitter::BL()
   FixupBranch branch{};
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::BL;
-  HINT(SystemHint::NOP);
+  NOP();
   return branch;
 }
 
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index 3e752dbf07..47787c2bba 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -603,6 +603,13 @@ public:
   void CNTVCT(ARM64Reg Rt);
 
   void HINT(SystemHint op);
+  void NOP() { HINT(SystemHint::NOP); }
+  void SEV() { HINT(SystemHint::SEV); }
+  void SEVL() { HINT(SystemHint::SEVL); }
+  void WFE() { HINT(SystemHint::WFE); }
+  void WFI() { HINT(SystemHint::WFI); }
+  void YIELD() { HINT(SystemHint::YIELD); }
+
   void CLREX();
   void DSB(BarrierType type);
   void DMB(BarrierType type);
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
index 3668eefa86..ee76104a12 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
@@ -322,7 +322,7 @@ bool JitArm64::HandleFastmemFault(uintptr_t access_address, SContext* ctx)
 
   const u32 num_insts_max = fastmem_area_length / 4 - 1;
   for (u32 i = 0; i < num_insts_max; ++i)
-    emitter.HINT(SystemHint::NOP);
+    emitter.NOP();
 
   m_fault_to_handler.erase(slow_handler_iter);