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[Android] Fix fastmem and enable.

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This commit is contained in:
Ryan Houdek 2013-09-02 04:10:21 -05:00
parent 679957dc98
commit e7157e7c52
2 changed files with 38 additions and 34 deletions
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14
Source/Core/Common/Src/MemArena.cpp
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@ -143,20 +143,20 @@ u8* MemArena::Find4GBBase()
return base; return base;
#else #else
#ifdef ANDROID #ifdef ANDROID
const u32 MemSize = 0x04000000; // Android 4.3 changed how mmap works.
// if we map it private and then munmap it, we can't use the base returned.
// This may be due to changes in them support a full SELinux implementation.
const int flags = MAP_ANON;
#else #else
const u32 MemSize = 0x31000000; const int flags = MAP_ANON | MAP_PRIVATE;
#endif #endif
void* base = mmap(0, MemSize, PROT_NONE, MAP_ANON | MAP_PRIVATE, -1, 0); const u32 MemSize = 0x31000000;
void* base = mmap(0, MemSize, PROT_NONE, flags, -1, 0);
if (base == MAP_FAILED) { if (base == MAP_FAILED) {
PanicAlert("Failed to map 1 GB of memory space: %s", strerror(errno)); PanicAlert("Failed to map 1 GB of memory space: %s", strerror(errno));
return 0; return 0;
} }
#ifndef ANDROID
// Android 4.3 changes how munmap works which causes crashes.
// Keep the memory space after allocating it...
munmap(base, MemSize); munmap(base, MemSize);
#endif
return static_cast<u8*>(base); return static_cast<u8*>(base);
#endif #endif
#endif #endif

58
Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
View File

@ -32,7 +32,7 @@
#include "JitAsm.h" #include "JitAsm.h"
#ifdef ANDROID #ifdef ANDROID
#define FASTMEM 0 #define FASTMEM 1
#else #else
#define FASTMEM 1 #define FASTMEM 1
#endif #endif
@ -455,36 +455,40 @@ void JitArm::lhz(UGeckoInstruction inst)
// Backpatch route // Backpatch route
// Gets loaded in to RD // Gets loaded in to RD
// Address is in R10 // Address is in R10
gpr.Unlock(rA, rB); if (Core::g_CoreStartupParameter.bFastmem)
if (inst.RA)
{ {
ARMReg RA = gpr.R(inst.RA); if (inst.RA)
MOV(R10, RA); // - 4 {
ARMReg RA = gpr.R(inst.RA);
MOV(R10, RA); // - 4
}
else
MOV(R10, 0); // - 4
LoadToReg(RD, R10, 16, (u32)inst.SIMM_16);
} }
else else
MOV(R10, 0); // - 4
LoadToReg(RD, R10, 16, (u32)inst.SIMM_16);
#else
if (inst.RA)
{
MOVI2R(rB, inst.SIMM_16);
ARMReg RA = gpr.R(inst.RA);
ADD(rB, rB, RA);
}
else
MOVI2R(rB, (u32)inst.SIMM_16);
MOVI2R(rA, (u32)&Memory::Read_U16);
PUSH(4, R0, R1, R2, R3);
MOV(R0, rB);
BL(rA);
MOV(rA, R0);
POP(4, R0, R1, R2, R3);
MOV(RD, rA);
gpr.Unlock(rA, rB);
#endif #endif
{
if (inst.RA)
{
MOVI2R(rB, inst.SIMM_16);
ARMReg RA = gpr.R(inst.RA);
ADD(rB, rB, RA);
}
else
MOVI2R(rB, (u32)inst.SIMM_16);
MOVI2R(rA, (u32)&Memory::Read_U16);
PUSH(4, R0, R1, R2, R3);
MOV(R0, rB);
BL(rA);
MOV(rA, R0);
POP(4, R0, R1, R2, R3);
MOV(RD, rA);
}
gpr.Unlock(rA, rB);
SetJumpTarget(DoNotLoad); SetJumpTarget(DoNotLoad);
} }
void JitArm::lha(UGeckoInstruction inst) void JitArm::lha(UGeckoInstruction inst)