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Adding MMU state values to state

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because that allow the MMU state to be loaded
This commit is contained in:
John Peterson 2013-05-19 17:14:29 +02:00
parent 2f00f87e8e
commit f452a6442f
4 changed files with 10 additions and 8 deletions
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11
Source/Core/Core/Src/HW/MemmapFunctions.cpp
View File

@ -598,9 +598,6 @@ union UPTE2
u32 Hex; u32 Hex;
}; };
u32 pagetable_base = 0;
u32 pagetable_hashmask = 0;
void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite) void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite)
{ {
if (_bWrite) if (_bWrite)
@ -644,8 +641,8 @@ void SDRUpdated()
{ {
return; return;
} }
pagetable_base = htaborg<<16; PowerPC::ppcState.pagetable_base = htaborg<<16;
pagetable_hashmask = ((xx<<10)|0x3ff); PowerPC::ppcState.pagetable_hashmask = ((xx<<10)|0x3ff);
} }
@ -821,7 +818,7 @@ u32 TranslatePageAddress(const u32 _Address, const XCheckTLBFlag _Flag)
// hash function no 1 "xor" .360 // hash function no 1 "xor" .360
u32 hash1 = (VSID ^ page_index); u32 hash1 = (VSID ^ page_index);
u32 pteg_addr = ((hash1 & pagetable_hashmask) << 6) | pagetable_base; u32 pteg_addr = ((hash1 & PowerPC::ppcState.pagetable_hashmask) << 6) | PowerPC::ppcState.pagetable_base;
// hash1 // hash1
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
@ -856,7 +853,7 @@ u32 TranslatePageAddress(const u32 _Address, const XCheckTLBFlag _Flag)
// hash function no 2 "not" .360 // hash function no 2 "not" .360
hash1 = ~hash1; hash1 = ~hash1;
pteg_addr = ((hash1 & pagetable_hashmask) << 6) | pagetable_base; pteg_addr = ((hash1 & PowerPC::ppcState.pagetable_hashmask) << 6) | PowerPC::ppcState.pagetable_base;
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
u32 pte = bswap(*(u32*)&pRAM[pteg_addr]); u32 pte = bswap(*(u32*)&pRAM[pteg_addr]);

2
Source/Core/Core/Src/PowerPC/PowerPC.cpp
View File

@ -138,6 +138,8 @@ void Init(int cpu_core)
ppcState.itlb_last = 0; ppcState.itlb_last = 0;
memset(ppcState.itlb_va, 0, sizeof(ppcState.itlb_va)); memset(ppcState.itlb_va, 0, sizeof(ppcState.itlb_va));
memset(ppcState.itlb_pa, 0, sizeof(ppcState.itlb_pa)); memset(ppcState.itlb_pa, 0, sizeof(ppcState.itlb_pa));
ppcState.pagetable_base = 0;
ppcState.pagetable_hashmask = 0;
ResetRegisters(); ResetRegisters();
PPCTables::InitTables(cpu_core); PPCTables::InitTables(cpu_core);

3
Source/Core/Core/Src/PowerPC/PowerPC.h
View File

@ -64,6 +64,9 @@ struct GC_ALIGNED64(PowerPCState)
u32 itlb_va[128]; u32 itlb_va[128];
u32 itlb_pa[128]; u32 itlb_pa[128];
u32 pagetable_base;
u32 pagetable_hashmask;
InstructionCache iCache; InstructionCache iCache;
}; };

2
Source/Core/Core/Src/State.cpp
View File

@ -59,7 +59,7 @@ static Common::Event g_compressAndDumpStateSyncEvent;
static std::thread g_save_thread; static std::thread g_save_thread;
// Don't forget to increase this after doing changes on the savestate system // Don't forget to increase this after doing changes on the savestate system
static const u32 STATE_VERSION = 18; static const u32 STATE_VERSION = 19;
enum enum
{ {