mirrors/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-02-02 11:02:28 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

Jit_Integer: Handle NOP case for xori and xoris

Browse Source 
Like ori and oris, xori and xoris can also be used to introduce a NOP.
In that case, just don't do anything.
This commit is contained in:
Lioncash 2018-03-22 15:41:34 -04:00
parent 007f9e5309
commit fc16a78f6a
2 changed files with 21 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
View File

@ -326,11 +326,19 @@ void Jit64::reg_imm(UGeckoInstruction inst)
regimmop(a, s, true, inst.UIMM << 16, And, &XEmitter::AND, true); regimmop(a, s, true, inst.UIMM << 16, And, &XEmitter::AND, true);
break; break;
case 26: // xori case 26: // xori
regimmop(a, s, true, inst.UIMM, Xor, &XEmitter::XOR, false);
break;
case 27: // xoris case 27: // xoris
regimmop(a, s, true, inst.UIMM << 16, Xor, &XEmitter::XOR, false); {
if (s == a && inst.UIMM == 0)
{
// Make the nop visible in the generated code.
NOP();
return;
}
const u32 immediate = inst.OPCD == 26 ? inst.UIMM : inst.UIMM << 16;
regimmop(a, s, true, immediate, Xor, &XEmitter::XOR, false);
break; break;
}
case 12: // addic case 12: // addic
regimmop(d, a, false, (u32)(s32)inst.SIMM_16, Add, &XEmitter::ADD, false, true); regimmop(d, a, false, (u32)(s32)inst.SIMM_16, Add, &XEmitter::ADD, false, true);
break; break;

13
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
View File

@ -142,12 +142,19 @@ void JitArm64::arith_imm(UGeckoInstruction inst)
reg_imm(a, s, inst.UIMM << 16, BitAND, &ARM64XEmitter::ANDI2R, true); reg_imm(a, s, inst.UIMM << 16, BitAND, &ARM64XEmitter::ANDI2R, true);
break; break;
case 26: // xori case 26: // xori
reg_imm(a, s, inst.UIMM, BitXOR, &ARM64XEmitter::EORI2R);
break;
case 27: // xoris case 27: // xoris
reg_imm(a, s, inst.UIMM << 16, BitXOR, &ARM64XEmitter::EORI2R); {
if (a == s && inst.UIMM == 0)
{
// NOP
return;
}
const u32 immediate = inst.OPCD == 26 ? inst.UIMM : inst.UIMM << 16;
reg_imm(a, s, immediate, BitXOR, &ARM64XEmitter::EORI2R);
break; break;
} }
}
} }
void JitArm64::addix(UGeckoInstruction inst) void JitArm64::addix(UGeckoInstruction inst)