xmrig
3ebff4137c
Update CHANGELOG.md
2018-02-19 15:58:44 +07:00
XMRig
def56d5233
v2.4.5 RC
2018-02-19 04:31:50 +07:00
xmrig
968365ffc5
Update README.md
2018-02-19 04:17:50 +07:00
xmrig
e5ffa34206
Update README.md
2018-02-18 05:49:37 +07:00
xmrig
5c598ef545
Merge pull request #379 from DeadManWalkingTO/master
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Update README.md
2018-02-18 05:48:09 +07:00
xmrig
2cce6e0c72
Update CHANGELOG.md
2018-02-18 05:32:36 +07:00
xmrig
2cb4424f99
Update README.md
2018-02-18 05:06:10 +07:00
XMRig
2571fd1958
Merge branch 'master' of github.com:xmrig/xmrig
2018-02-08 17:35:20 +07:00
XMRig
c434312be6
Merge branch 'Foudge-master'
2018-02-08 17:34:33 +07:00
XMRig
8a3b8ff788
Fix code style, replace tabs to space #2 .
2018-02-08 17:21:12 +07:00
XMRig
9cf2b0a782
Fix code style, replace tabs to space.
2018-02-08 17:02:32 +07:00
XMRig
640592ad95
Merge branch 'master' of https://github.com/Foudge/xmrig into Foudge-master
2018-02-08 16:56:20 +07:00
Foudge
0184647f7e
Correct L2 cache size calculation for Intel Core 2 family
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This is a workaround for total L2 cache size calculation of Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue. These processors have L2 cache shared by 2 cores.
There is maybe more CPU with L2 shared cache, but I am sure that these models are concerned and they are not so numerous.
A better way would be to modify libcpuid to implement L2 cache counting.
2018-02-03 16:31:13 +01:00
DeadManWalking
8f61bd5f58
Update README.md
2018-02-02 00:58:11 +02:00
DeadManWalking
3d464088ae
Update README.md
2018-02-02 00:54:58 +02:00
DeadManWalking
4abec1e177
Update README.md
2018-02-02 00:14:39 +02:00
DeadManWalking
1dad11068e
Merge pull request #1 from xmrig/master
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!
2018-02-01 23:02:32 +02:00
Foudge
8869ede7b5
Compilation error under FreeBSD
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ULONG is not recognized under this OS, so replaced it with more portable definition.
2018-01-28 18:13:00 +01:00
Foudge
50e4f9e3e7
up to 20% perf increase with Cryptonight with non-AES CPU
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This time, the performance increase is got with MSVC and GCC. On non-AES CPU, there were an useless load/store SSE2 register. The last MSVC "hack" is replaced by a portable code and he's more complete (a load is saved).
On my C2Q6600, with 3 thread, I have +16% with MSVC2015 and +20% with GCC 7.3, compared to official 2.4.4 version.
2018-01-28 12:58:19 +01:00
Foudge
107cf54513
Remove compilation warnings under MSVC
2018-01-27 11:42:22 +01:00
xmrig
8ce7b1fd54
Merge pull request #353 from Foudge/master
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up to 15% boost on CryptoNight algo with non-AES CPU
2018-01-26 00:53:22 +07:00
XMRig
fd4e37bee7
#341 Added option --dry-run.
2018-01-20 20:43:31 +07:00
Foudge
7c79ecb786
+15% boost with non-AES CPU
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Performance boost validated on Core 2 Quad processor under Windows 10.
But it's Windows/MS Visual C++ specific.
2018-01-20 10:43:56 +01:00
XMRig
d099bef71f
#341 Fix wrong exit code.
2018-01-20 12:58:43 +07:00
xmrig
357d2cb9f0
Merge pull request #324 from stanz2g/master
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can build without microhttpd when WITH_HTTPD=OFF
2018-01-20 01:35:12 +07:00
xmrig
6352881fe6
Update CHANGELOG.md
2018-01-11 15:08:24 +07:00
XMRig
f8481a4430
#328 Added guard to prevent paused message spam and crash.
2018-01-10 22:55:45 +07:00
XMRig
aa60605578
Merge branch 'master' of github.com:xmrig/xmrig
2018-01-10 17:35:40 +07:00
XMRig
409741ddc1
Fix version.
2018-01-10 16:56:08 +07:00
xmrig
00b96be5fc
Update README.md
2018-01-07 21:36:49 +07:00
stanz2g
49337f9992
can build without microhttpd when WITH_HTTPD=OFF
2018-01-06 17:07:07 +08:00
XMRig
1c68ca4f9d
Add libmicrohttpd version to --version output.
2018-01-05 19:41:19 +07:00
XMRig
5b6045d398
Fix recent MSVC 2017 version detection.
2018-01-05 17:23:39 +07:00
XMRig
aacb9b271e
Fix wrong signal handle.
2018-01-04 11:38:32 +07:00
XMRig
4791e531f1
Update README.md.
2018-01-02 13:49:31 +07:00
XMRig
56e21b41fa
Remove extra semicolon.
2018-01-02 13:41:00 +07:00
XMRig
158c4c1b64
#279 Add missing stdio header
2018-01-02 12:24:57 +07:00
XMRig
9fd354fee4
#262 Reduce cmake version requirement to 2.8.
2017-12-16 19:27:11 +07:00
XMRig
d0852c6ecb
v2.4.3
2017-11-30 02:11:15 +03:00
xmrig
58d15d6c4b
Update CHANGELOG.md
2017-11-29 18:49:28 +03:00
xmrig
546956cb7d
Update CHANGELOG.md
2017-11-29 17:54:12 +03:00
XMRig
5f51eddd62
#216 Added ARMv7 support.
2017-11-26 22:23:23 +03:00
XMRig
d6f806c22a
Merge branch 'arm'
2017-11-24 23:47:12 +03:00
XMRig
30c52afc40
Fixed build in termux environment, thanks Imran Yusuff.
2017-11-24 00:23:04 +03:00
XMRig
9c59df515a
#200 Use fprintf failback when fail to use uv_tty.
2017-11-18 14:07:04 +03:00
XMRig
2776bea124
#204 Fix Linux build, again.
2017-11-17 22:44:36 +03:00
XMRig
c8947681d3
#196 Fix Linux build.
2017-11-17 12:59:46 +03:00
XMRig
368736dc28
Added ARMv8 (aarch64) support.
2017-11-06 03:11:35 +03:00
XMRig
420fb88049
Optimized software aes.
2017-11-03 05:35:29 +03:00
xmrig
40b507689b
Update CHANGELOG.md
2017-11-02 19:49:25 +03:00
