114 lines
3.4 KiB
C++
114 lines
3.4 KiB
C++
/* XMRig
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* Copyright 2010 Jeff Garzik <jgarzik@pobox.com>
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* Copyright 2012-2014 pooler <pooler@litecoinpool.org>
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* Copyright 2014 Lucas Jones <https://github.com/lucasjones>
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* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
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* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
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* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
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* Copyright 2016-2018 XMRig <https://github.com/xmrig>, <support@xmrig.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libcpuid.h>
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#include <math.h>
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#include <string.h>
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#include <thread>
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#include "core/cpu/AdvancedCpuInfo.h"
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xmrig::AdvancedCpuInfo::AdvancedCpuInfo() :
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m_aes(false),
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m_L2_exclusive(false),
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m_brand(),
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m_cores(0),
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m_L2(0),
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m_L3(0),
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m_sockets(1),
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m_threads(std::thread::hardware_concurrency())
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{
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struct cpu_raw_data_t raw = { 0 };
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struct cpu_id_t data = { 0 };
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cpuid_get_raw_data(&raw);
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cpu_identify(&raw, &data);
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strncpy(m_brand, data.brand_str, sizeof(m_brand) - 1);
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m_sockets = threads() / data.num_logical_cpus;
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if (m_sockets == 0) {
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m_sockets = 1;
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}
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m_cores = data.num_cores * m_sockets;
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m_L3 = data.l3_cache > 0 ? data.l3_cache * m_sockets : 0;
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// Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97
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if (data.vendor == VENDOR_AMD && data.ext_family >= 0x15 && data.ext_family < 0x17) {
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m_L2 = data.l2_cache * (cores() / 2) * m_sockets;
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m_L2_exclusive = true;
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}
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// Workaround for Intel Pentium Dual-Core, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue
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// These processors have L2 cache shared by 2 cores.
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else if (data.vendor == VENDOR_INTEL && data.ext_family == 0x06 && (data.ext_model == 0x0E || data.ext_model == 0x0F || data.ext_model == 0x17)) {
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int l2_count_per_socket = cores() > 1 ? cores() / 2 : 1;
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m_L2 = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0;
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}
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else{
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m_L2 = data.l2_cache > 0 ? data.l2_cache * cores() * m_sockets : 0;
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}
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m_aes = data.flags[CPU_FEATURE_AES];
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}
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size_t xmrig::AdvancedCpuInfo::optimalThreadsCount(size_t memSize, int maxCpuUsage) const
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{
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if (threads() == 1) {
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return 1;
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}
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size_t cache = 0;
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if (m_L3) {
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cache = m_L2_exclusive ? (m_L2 + m_L3) : m_L3;
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}
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else {
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cache = m_L2;
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}
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size_t count = 0;
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if (cache) {
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count = cache / memSize;
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if (cache % memSize >= memSize / 2) {
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count++;
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}
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}
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else {
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count = threads() / 2;
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}
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if (count > (size_t) threads()) {
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count = threads();
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}
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if (((float) count / threads() * 100) > maxCpuUsage) {
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count = (int) ceil((float) threads() * (maxCpuUsage / 100.0));
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}
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return count < 1 ? 1 : count;
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}
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